參數(shù)資料
型號： TC9324F
廠商： Toshiba Corporation
英文描述： Single-Chip DTS Microcontroller (DTS-20)
中文描述： 單芯片微丘（丘- 20）
文件頁數(shù)： 35/101頁
文件大小： 1831K
代理商： TC9324F
TC9324F
2002-02-08
35
(2)
Interrupt Latch
When an interrupt request is issued the interrupt latch is set to 1. If the interrupt is enabled, the
interrupt latch passes the request to accept the interrupt to the CPU and branches to the interrupt
routine. If the interrupt is accepted, the interrupt latch is automatically reset to 0.
The interrupt latch data can be read by software, allowing each application to check whether an
interrupt has been generated or not. In addition, an interrupt latch set to 1 by an interrupt request
can be reset to 0 and the interrupt request can be cleared or initialized.
(3)
Interrupt Priority Circuit Block
The interrupt priority circuit determines the interrupt handling priority when more than one
interrupt is generated at the same time or when an interrupt is enabled after several are generated.
This block also generates the vector address for the interrupt routine.
Priority
Interrupt source
Vector address
1
INTR1 pin
0001H
2
INTR2 pin
0002H
3
Serial interface 3/4
0003H
4
Serial interface 1
0004H
5
Timer-counter
0005H
6
Serial interface 2
0006H
Y1
Y2
Y4
Y8
φ
L13P2
ILR1
ILR2
ILR3
ILR4
Reset interrupt latch
Setting 1 resets the interrupt latch to 0.
0: No interrupt generated
1: Interrupt generated
Y1
Y2
Y4
Y8
φ
K13P2
ILR1
ILR2
ILR3
ILR4
ILR1
INTR1 pin
ILR2
INTR2 pin
ILR3
Serial interface 3/4
ILR4
Serial interface 1
ILR5
8-bit timer-counter
ILR6
Serial interface 2
Interrupt latch data
When an interrupt request is issued, set to 1.
When an interrupt request is accepted, reset to 0.
Y1
Y2
Y4
Y8
φ
L14P2
ILR5
ILR6
*
*
Y1
Y2
Y4
Y8
φ
K14P2
ILR5
ILR6
0
0
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