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參數(shù)資料
| 型號： | STPCD0175BTI3 |
| 廠商： | 意法半導體 |
| 元件分類： | 微處理器 |
| 英文描述： | PC Compatible Embedded Microprocessor |
| 中文描述： | PC兼容嵌入式微處理器 |
| 文件頁數(shù)： | 2/48頁 |
| 文件大?。?/td> | 762K |
| 代理商： | STPCD0175BTI3 |
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STPC CLIENT
2/48
Issue 1.7 - February 8, 2000
X86 Processor core
Fully static 32-bit 5-stage pipeline, x86 proc-
essor with DOS, Windows and UNIX compat-
ibility.
Can access up to 4GB of external memory.
KBytes unified instruction and data cache
with write back and write through capability.
Parallelprocessing integral floating pointunit,
with automatic power down.
Clock core speeds up to of 75 MHz.
Fully static design for dynamic clock control.
Low power and system management modes.
Optimized design for 3.3V operation.
DRAM Controller
Integrated system memory andgraphic frame
memory.
Supports up to 128 MBytes system memory
in 4 banks and as little as MBytes.
Supports 4MBytes, 8MBites, 16MBites,
32MBites single-sided and double-sided
DRAM SIMMs.
Four quad-word write buffersfor CPU to
DRAM and PCI to DRAM cycles.
Four 4-word read buffers for PCI masters.
Supports Fast Page Mode & EDO DRAMs.
Programmable timing for DRAM parameters
including CAS pulse width, CAS pre-charge
time, and RAS to CAS delay.
60, 70, 80 & 100ns DRAM speeds.
Memory hole size of 1 MByte to 8 MBytes
supported for PCI/ISA buses.
Hidden refresh.
To check if your memory device is supported by
the STPC, please refer to Table 7-69 in the
Programming Manual.
Graphics Controller
64-bit windows accelerator.
Backward compatibility to SVGA standards.
Hardware acceleration for text, bitblts, trans-
parent blts and fills.
Up to 64 x 64 bit graphics hardware cursor.
Up to 4MB long linear frame buffer.
8-, 16-, and 24-bit pixels.
CRT Controller
Integrated 135MHz triple RAMDAC allowing
up to 1024 x 768 x 75Hz display.
8-, 16-, 24-bit per pixels.
Interlaced or non-interlaced output.
Video Pipeline
Two-tap interpolative horizontal filter.
Two-tap interpolative vertical filter.
Colour space conversion (RGB to YUV and
YUV to RGB).
Programmable window size.
Chroma and colour keying allowing video
overlay.
Programmable two tap filter with gamma cor-
rection or three tap flicker filter.
Progressive to interlaced scan converter.
Video Input port
Decodes video inputs in ITU-R 601/656 com-
patible formats.
Optional 2:1 decimator
Stores captured video in off setting area of
the onboard frame buffer.
Video pass through to the onboard PAL/
NTSC encoder for full screen video images.
HSYNC and B/T generation or lock onto
external video timing source.
PCI Controller
Integrated PCI arbitrationinterface able to
directly manage up to 3 PCI masters at a
time.
Translation of PCI cycles to ISA bus.
Translation of ISA master initiated cycle to
PCI.
Support for burst read/write from PCI master.
The PCI clock runs at a third or half CPU
clock speed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STPD0175BTI3 | PC Compatible Embedded Microprocessor |
| STPD0166BTA3 | RP15 (F) Series - Powerline Regulated DC-DC Converters; Input Voltage (Vdc): 12V; Output Voltage (Vdc): 3.3V; 2:1 Wide Input Voltage Range; 15 Watts Output Power; 1.6kVDC Isolation; UL Certified; Fixed Operating Frequency; Six-Sided Continuous Shield; Standard 50.8 x25.4x10.2mm Package; Efficiency to 88% |
| STPD0175BTA3 | PC Compatible Embedded Microprocessor |
| STPCE1EDBC | X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1 | STPC ELITE DATASHEET / X86 CORE GENERAL PURPOSE PC COMPATIBLE SYSTEM ON CHIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPCE1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STPC ELITE DATASHEET / X86 CORE GENERAL PURPOSE PC COMPATIBLE SYSTEM ON CHIP |
| STPCE1DDBC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| STPCE1DDBI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| STPCE1EDBC | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1EDBI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
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