參數(shù)資料
型號: STP1081ABGA-125
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA256
封裝: PLASTIC, BGA-256
文件頁數(shù): 27/32頁
文件大?。?/td> 478K
代理商: STP1081ABGA-125
4
STP1081
Preliminary
Companion Device for 250/300 MHz UltraSPARC-II Systems
UltraSPARC
-II Data Buffer (UDB-II)
July 1997
TECHNICAL OVERVIEW
Data Buffering
UltraSPARC-II supports multiple outstanding requests to the system. The list below gives details:
Read requests are supported for load/store misses in the E-Cache (P_RDS/P_RDO P_REQ packets on the
UPA):
- up to three outstanding read requests on the UPA with only one outstanding instruction miss (P_RDSA)
- two writeback requests on the UPA
In addition, US-II supports the following requests:
- two block loads (P_RDD/P_NCBRD)
- only one outstanding noncacheable load
UDB-II supports data buffering for up to eight outstanding noncacheable 16-byte stores.
The UDB-II provides three 64-byte read buffers to support the three possible outstanding miss requests.
The UDB-II has two clock domains, one using the UPA clock, the other using a xed 2:1 ratio CPU clock. (For
example: 4 ns US-II CPU clock and 8 ns UDB-II EBUS_CLK.) The ECU and SRAMs communicate with the
UDB-II on a xed 2:1 bus, independent of UPA clock ratio.
64-Byte Buffers
64-byte buffers are provided for reads from the data bus, and for snoops and writebacks from the E-Cache
bus. UDB-II has buffer support for two outstanding writebacks. The writeback buffer is snoopable.
16-Byte Buffers
The UDB-II can hold data for eight noncacheable stores in progress. This store data comes from the store
buffer of the UltraSPARC-II.
The processor makes successive stores to the same 16-byte piece of data to be merged into one 128-bit store.
The MMU E-bit inhibits store merging for pages that cannot tolerate merge due to size or order sensitivity.
Consequently, noncacheable stores may have 128 bits of data, and 16-byte write enables.
8-Byte Buffers
Two mondo vectors, each consisting of three 64-bit packets, are also buffered in the UDB-II. One buffer holds
data going from the UltraSPARC-II to the UPA, while the other holds data going from the UPA to the
UltraSPARC.
Sub-Block Ordering
The UDB-II delivers and receives 16-byte sub-blocks in desired-word-rst order. Subsequent blocks are deliv-
ered in order, wrapping to the beginning of the block, if necessary. UDB-II does no data re-ordering.
All 64-byte write-backs from UltraSPARC-II are delivered starting with sub-block zero. Snoops also return
data with the desired sub-block rst. The UDB-II has the ability to supply pending copyback data in the cor-
rect order for a snoop.
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