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參數(shù)資料
| 型號(hào)： | STA323WTR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2.1 HIGH EFFICIENCY DIGITAL AUDIO SYSTEM |
| 中文描述： | 2.1高效率數(shù)字音頻系統(tǒng) |
| 文件頁(yè)數(shù)： | 20/41頁(yè) |
| 文件大?。?/td> | 749K |
| 代理商： | STA323WTR |
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STA323W
20/41
7.6.5 Zero-Crossing Volume Enable
The ZCE bit enables zero-crossing volume adjustments. When volume is adjusted on digital zero-cross-
ings no clicks will be audible.
7.6.6 Soft Volume Update Enable
The STA323W includes a soft volume algorithm that will step through the intermediate volume values at
a predetermined rate when a volume change occurs. By setting SVE=0 this can be bypassed and volume
changes will jump from old to new value directly. This feature is only available if individual channel volume
bypass bit is set to ‘0’.
7.7 Configuration Register F (Address 05h)
7.7.1 Output Configuration Selection
Table 15. Output Configuration Selections
7.7.2 nvalid Input Detect Mute Enable
Setting the IDE bit enables this function, which looks at the input I
2
S data and clocking and will automati-
cally mute all outputs if the signals are perceived as invalid.
BIT
R/W
RST
NAME
DESCRIPTION
6
R/W
1
ZCE
Zero-Crossing Volume Enable:
1 – Volume adjustments will only occur at digital zero-crossings
0 – Volume adjustments will occur immediately
BIT
7
R/W
R/W
RST
1
NAME
SVE
DESCRIPTION
Soft Volume Enable:
1 – Volume adjustments will use soft volume
0 – Volume adjustments will occur immediately
D7
D6
D5
D4
RES
1
D3
D2
IDE
1
D1
D0
EAPD
0
PWDN
1
ECLE
0
BCLE
1
OCFG1
1
OCFG0
0
BIT
1…0
R/W
R/W
RST
00
NAME
OCFG
(1…0)
DESCRIPTION
Output Configuration Selection
00 – 2-channel (Full-bridge) Power, 1-channel DDX is default
OCFG (1...0)
00
Output Power Configuration
2 Channel (Full-Bridge) Power, 1 Channel DDX:
1A/1B
1A/1B
2A/2B
2A/2B
2(Half-Bridge).1(Full-Bridge) On-Board Power:
1A
1A Binary
2A
1B Binary
3A/3B
2A/2B Binary
Reserved
1 Channel Mono-Parallel:
3A
1A/1B
3B
2A/2B
01
10
11
BIT
2
R/W
R/W
RST
1
NAME
IDE
DESCRIPTION
Invalid Input Detect Auto-Mute Enable:
0 – Disabled
1 – Enabled
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