參數(shù)資料
型號(hào)： SSTUA32864EC,557
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
封裝： 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96
文件頁(yè)數(shù)： 3/20頁(yè)
文件大?。?/td> 117K
代理商： SSTUA32864EC,557
SSTUA32864_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 9 March 2007
11 of 20
NXP Semiconductors
SSTUA32864
1.8 V congurable registered buffer for DDR2-667 RDIMM applications
11. Test information
11.1 Test circuit
All input pulses are supplied by generators having the following characteristics:
PRR
≤ 10 MHz; Z
0 =50 ; input slew rate = 1 V/ns ± 20 %, unless otherwise specied.
The outputs are measured one at a time with one transition per measurement.
(1) CL includes probe and jig capacitance.
Fig 6.
Load circuit
(1) IDD tested with clock and data inputs held at VDD or GND, and IO = 0 mA.
Fig 7.
Voltage and current waveforms; inputs active and inactive times
VID = 600 mV
VIH =Vref + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs.
VIL =Vref 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs.
Fig 8.
Voltage waveforms; pulse duration
RL = 100
RL = 1000
VDD
50
CK inputs
CK
OUT
DUT
test point
002aaa371
test point
delay = 350 ps
Zo = 50
RL = 1000
CL = 30 pF(1)
LVCMOS
RESET
10 %
IDD(1)
tINACT
VDD
0.5VDD
tACT
90 %
0 V
002aaa372
0.5VDD
VICR
VIH
VIL
input
tW
VID
002aaa373
相關(guān)PDF資料
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SSTUA32866EC/G 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
SSTUA32866EC,557 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
SSTUA32866EC/G,551 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
SSTUA32866EC/G,557 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SSTUA32864EG 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V configurable registered buffer for DDR2-667 RDIMM applications
SSTUA32866 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications
SSTUA32866BHLF 功能描述:IC REGIST BUFFER 25BIT DDR 96BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR)
SSTUA32866BHLFT 功能描述:IC REGIST BUFFER 25BIT DDR 96BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR)
SSTUA32866BHMLF 制造商:Integrated Device Technology Inc 功能描述:REGISTERED BFFR SGL 25-CH CMOS 96TFBGA - Bulk
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