參數(shù)資料
型號: SN74V3690-15PEU
廠商: Texas Instruments, Inc.
英文描述: 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
中文描述: 的3.3V的CMOS先入先出存儲器
文件頁數(shù): 46/50頁
文件大小: 729K
代理商: SN74V3690-15PEU
SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690
1024
×
36, 2048
×
36, 4096
×
36, 8192
×
36, 16384
×
36, 32768
×
36
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS668A
NOVEMBER 2001
REVISED MARCH 2003
46
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
depth-expansion configuration (FWFT mode only) (continued)
For a full expansion configuration, the amount of time it takes for IR of the first FIFO in the chain to go low after
a word has been read from the last FIFO is the sum of the delays for each individual FIFO:
(n
1)
(3
transfer clock)
2t
WCLK
Where:
n
t
WCLK
= WCLK period
= number of FIFOs in the expansion
Note that extra cycles should be added for the possibility that the t
sk1
specification is not met between RCLK
and the transfer clock, or WCLK and the transfer clock, for the IR flag.
The transfer-clock line should be tied to either WCLK or RCLK, whichever is faster. Both these actions result
in data moving as quickly as possible to the end of the chain and moving free locations to the beginning of the
chain.
P
(2)
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