參數(shù)資料
型號(hào): SAF7846HL
廠商: NXP Semiconductors N.V.
元件分類: 存儲(chǔ)器
英文描述: One chip CD audio device with integrated MP3-WMA decoder
封裝: SAF7843HL/M295<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;SAF7849HL/M245<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.h
文件頁數(shù): 22/93頁
文件大?。?/td> 396K
代理商: SAF7846HL
SAF784X_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
22 of 93
NXP Semiconductors
SAF784x
One chip CD audio device with integrated MP3/WMA decoder
The detected bits are then sent to the demodulator for sync extraction and EFM
demodulation. For playing on damaged or out-of-specification discs, flywheels are in place
to make the sync extraction more robust.
6.5.5.1
Signal conditioning
This device has a number of blocks which process the incoming 6-bit HF signal.
Integrate-and-dump block to adapt the frequency of the ADC to the system clock
Peak detection logic for amplitude measurement
Peak detection logic for DC-offset measurement
Digital high-pass filter with configurable cut-off frequency
DC and gain control logic for on-board variable gain and offset control (in the analog
section)
A defect detector
All blocks can be configured under microprocessor control.
Integrate-and-dump block:
the ADC delivers one sample every xclk period (= one
sample every hf_clk period). The sample rate needs to be adapted from this xclk rate to
the lower sysclk rate. For more information on sysclk speed, see
Section 6.5.3 on
page 19
. The integrate-and-dump block converts the incoming samples at the hf_clk
frequency into a stream of one sample per sysclk period. It converts an average of a
number of samples to achieve this. If the division factor for the system clock is /2, /4, /8,
/16, /32, an average of 2, 4, 8, 16 or 32 incoming samples respectively, is taken and
passed further. This results in a gain in the number of effective bits of the A-D conversion.
High-pass filter:
A 1st-order IIR high-pass filter with a variable 3 dB point is implemented
to filter out the remaining DC jump-on defects. Most of these defects will have been
filtered by the analog HPF. The cut-off frequency of the digital high-pass filter can be
changed on-the-fly, by writing to register HighPassFiltCont.
It is possible to reset the state of the high-pass filter via bit 6 of register HighPassFiltCont.
The input and the output of the high-pass filter are 8-bits wide.
The high-pass filter is implemented in a ‘1 minus low pass’ structure. It is possible to hold
the low-pass filter on defects. For more information, see
Section “Defect detector” on
page 26
.
Fig 11. Signal conditioning block diagram
001aag315
hold
hold signals to
bit detection
HF data to
bit detection
INTEGRATE
AND
DUMP
ADC
ANALOG
HPF
OFFSET
MEASUREMENT
PEAK
DETECTOR
PEAK
DETECTOR
DEFECT
DETECTOR
AGC/
AOC
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SAF7846HL/M210,557 功能描述:音頻 DSP 1 chip CD Audio Dev w/Integrated decoder RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7847HL/M201,557 功能描述:音頻 DSP 1 chip CD Audio Dev w/Integrated decoder RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7849HL/M245,557 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7849HL/M295,557 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7860HL/M2,557 制造商:NXP Semiconductors 功能描述:DSP