參數(shù)資料
型號: SM3-19.44M
廠商: Connor-Winfield
文件頁數(shù): 6/36頁
文件大小: 0K
描述: IC MOD TIMING 19.440MHZ STATUM 3
標(biāo)準(zhǔn)包裝: 1
系列: SM3
類型: 定時模塊,系統(tǒng)時鐘
PLL:
主要目的: 以太網(wǎng),ADM,DSLAM,SONET/SDH,Stratum,TDM
輸入: LVCMOS
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 4:3
差分 - 輸入:輸出: 無/無
頻率 - 最大: 19.44MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 32-DIP 模塊
包裝: 管件
其它名稱: CW642
SM3 19.44M
SM319.44M
SM3 Data Sheet #:
TM052
Page 14 of 36 Rev: 06 Date:01/26/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
Register Descriptions and Operation continued
Ref_Pullin_Sts, 0x09 (R)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0:Default
ref4sts
ref3sts
ref2sts
ref1sts
1:inrange
0:outrange
0:outrange 0:out
range
Each bit indicates if the reference is within the frequency range specified by the value in the
Max_Pullin register.
Ref_Qualified, 0x0a (R)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0:Default
ref4qual:
ref3qual:
ref2qual:
ref1qual:
1:avail.
0:notavail.
This register contains the “anded” condition of the
Ref_Activity and Ref_Pullin_Sts registers for each of the Ref1-4 inputs,
qualified for 10 seconds. When a reference signal has been present for > 10 seconds and is within the pull-in range, it’s
bit is set.
Ref_Mask, 0x0b (R/W)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0:Default
ref4mask:
ref3mask:
ref2mask:
ref1mask:
1:avail.
0:notavail.
Default:0
Individual references may be marked as “available” or “not available” for selection in the automatic reference selection
mode
(bit 1 = 0 in the
Ctl_Mode register). The reset default value is 0, “not available”. In manual reference selection, either
hardware or register controlled, the reference masks have no effect, but do remain valid and are applied upon a transi-
tion to automatic mode.
Ref_Available, 0x0c (R)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0:Default
ref4avail:
ref3avail:
ref2avail:
ref1avail:
1:avail.
0:notavail.
0:not
This register contains the “anded” condition of the
Ref_Qualified and Ref_Mask registers.
Ref_Rev_Delay, 0x0d (R/W)
Bit 7 ~ Bit 0
Referencereversiondelaytime,0-255minutes.default,00000101,5minutes
In automatic reference selection mode, when a reference fails and later returns, it must be available for the time speci-
fied in the Ref_Rev_Delay register before it can be switched back to as the active reference (if the new reference was
marked as “revertive”). See Figure 7.
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