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參數(shù)資料
| 型號： | SM3-19.44M |
| 廠商： | Connor-Winfield |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MOD TIMING 19.440MHZ STATUM 3 |
| 標準包裝： | 1 |
| 系列： | SM3 |
| 類型： | 定時模塊，系統(tǒng)時鐘 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，ADM，DSLAM，SONET/SDH，Stratum，TDM |
| 輸入： | LVCMOS |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 4:3 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 19.44MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 32-DIP 模塊 |
| 包裝： | 管件 |
| 其它名稱： | CW642 SM3 19.44M SM319.44M |
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SM3 Data Sheet #:
TM052
Page 23 of 36 Rev: 06 Date: 01/26/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
Performance Specifications continued
Capture range and Hold range – Capture range and Hold range are the maximum frequency errors on the reference input within
which the phase locked loop is able to achieve lock and hold lock, respectively. The SM3 stratum 3 performance is shown below:
Characteristic
SM3
Requirement
Capturerange
±25.5ppmmaximum
GR-1244-CORE,Sec3.4
Holdrange
±25.5ppmmaximum
GR-1244-CORE,Sec3.4
Maximum
This is the minimum capability, and guarantees the ability to capture and lock with a reference that is offset the maximum allowed in
one direction in the presence of a clock that is offset the maximum in the opposite direction (4.6 ppm + 4.6 ppm = 9.2 ppm).
Master/Slave Skew and Reference switch settling time– Master/Slave Skew and Reference switch settling time performance
are shown below:
Characteristic
SM3
Requirement
Master/Slavephaseskew
<2nS
N/A
Referenceswitchsettlingtime
Stratum3:<100sec.upto20ppm
Stratum3:<100sec.up
frequencyoffset
to+/-4.6ppmfrequencyoffset
SM3 Initialization:
After the module is powered up, pull the reset pin low for 10ms. Wait 1200ms and read the contents of register 0x33. If it reads 1
then the module came up properly. If it reads 0 then reset the module and re-read register0c33 after 1200ms. The contents of 0x33
must read 1 before using the module. On power up or after a reset all the registers are loaded with their default values. The default
values of some important registers are given below assuming the SM3 module operates as a Master
Address(Hex)
Register Name
Value(Binary MSB first) Notes
0x03
Bandwidth_PBO
00000111
Bandwidth = 0.098Hz
0x04
Ctl_Mode
0000r010
r - Read Only
0x05
Op_Mode
00010000
Indicates Free run mode
0x06
Max_Pullin_Range
01100100
0x0b
Ref_Mask
00000000
0x0d
Ref_Rev_Delay
00000101
0x0e
Phase_Offset
00000000
0x0f
Calibration
00000000
0x11
DPLL_Status
00000000
Indicates No Active Reference
0x13
Intr_Enable
00000000
Indicates Interrupts are disabled
0x1c-0x23
Ref(1-8)_Frq_Priority
xxxx0000
Frequencies are auto detected
0x33
Chksum
xxxxxxx1
Bit0 should be high to indicate that data has been
loaded correctly from the EEPROM.
I. The unit starts up in Free Run and operates in Manual mode. Here are the steps that need to be taken to lock the unit to a
reference in Manual mode.
1.
Apply signal to the reference inputs.
2.
Set the appropriate pull in range by writing to address 0x06.
3.
A value of 0001xxxx, depending on which (Ref 1-8) reference to lock to, should be written to address 0x05.
4.
Enable Reference mask for appropriate references by writing a 1 to the reference bit in address 0x0b.
5.
Enable all Interrupts by writing 11111111 to address 0x13.
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