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| 型號(hào)： | SII3114_07 |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | PCI to Serial ATA Controller |
| 中文描述： | PCI到Serial ATA控制器 |
| 文件頁(yè)數(shù)： | 8/127頁(yè) |
| 文件大小： | 598K |
| 代理商： | SII3114_07 |
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SiI
3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
SiI
-DS-0103-D
viii
2007 Silicon Image, Inc.
List of Tables
Table 1. Absolute Maximum Ratings .............................................................................................................. 4
Table 2. DC Specifications.............................................................................................................................. 4
Table 3. SATA Interface DC Specifications..................................................................................................... 5
Table 4. SATA Interface Timing Specifications ............................................................................................... 5
Table 5. SATA Interface Transmitter Output Jitter Characteristics ................................................................. 6
Table 6. CLKI SerDes Reference Clock Input Requirements......................................................................... 6
Table 7. PCI 33 MHz Timing Specifications.................................................................................................... 6
Table 8. PCI 66 MHz Timing Specifications.................................................................................................... 7
Table 9.
SiI
3114 Pin Listing ............................................................................................................................ 8
Table 10. Pin Types ......................................................................................................................................12
Table 11. Auto-Initialization from Flash Timing.............................................................................................22
Table 12. Flash Data Description..................................................................................................................22
Table 13. Auto-Initialization from EEPROM Timing......................................................................................23
Table 14. Auto-Initialization from EEPROM Timing Symbols.......................................................................23
Table 15. EEPROM Data Description...........................................................................................................24
Table 16.
SiI
3114 PCI Configuration Space .................................................................................................25
Table 17.
SiI
3114 Internal Register Space – Base Address 0......................................................................40
Table 18.
SiI
3114 Internal Register Space – Base Address 1......................................................................41
Table 19.
SiI
3114 Internal Register Space – Base Address 2......................................................................42
Table 20.
SiI
3114 Internal Register Space – Base Address 3......................................................................43
Table 21.
SiI
3114 Internal Register Space – Base Address 4......................................................................44
Table 22.
SiI
3114 Internal Register Space – Base Address 5......................................................................46
Table 23. Software Data Byte, Base Address 5, Offset 00
H
.........................................................................53
Table 24. Software Data Byte, Base Address 5, Offset 10
H
.........................................................................55
Table 25. SError Register Bits (DIAG Field).................................................................................................69
Table 26. SError Register Bits (ERR Field)..................................................................................................69
Table 27. Physical Region Descriptor (PRD) Format...................................................................................82
Table 28. Power Management Register Bits................................................................................................83
Table 29. FIS Summary................................................................................................................................85
Table 30. Configuration Bits for FIS Reception ............................................................................................86
Table 31. Default FIS Configurations............................................................................................................87
Table 32. ATA Commands Supported...........................................................................................................90
Table 33. Data FIS........................................................................................................................................93
Table 34. Vendor Specific Command Summary...........................................................................................96
Table 35. 16-Entry Command Protocol Table.............................................................................................108
Table 36. Registers Used When Issuing VS Set Command ......................................................................108
Table 37. Default State - VS_LOCKED ......................................................................................................109
Table 38. VS_VS.........................................................................................................................................109
Table 39. VS_RSV...................................................................................................................................... 110
Table 40. VS_IND....................................................................................................................................... 110
Table 41. VS_VS_RSV............................................................................................................................... 110
Table 42. VS_VS_IND ................................................................................................................................ 110
Table 43. VS_RSV_IND...............................................................................................................................111
Table 44. VS_VS_RSV_IND........................................................................................................................111
Table 45. Protocol Code Encoding Scheme............................................................................................... 112
Table 46. Vendor Specific Protocol Code (in Alphabetical Order).............................................................. 113
Table 47. Vendor Specific Protocol Code (by Protocol Code).................................................................... 114
Table 48. Vendor Specific Protocol Code (in Alphabetical Order).............................................................. 115
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SiI3114CT176 | PCI to Serial ATA Controller |
| SiI3114CTU | PCI to Serial ATA Controller |
| SII3124A | PCI-X to Serial ATA Controller |
| SiI3124ACBHU | PCI-X to Serial ATA Controller |
| SII3132 | PCI Express to 2-Port Serial ATA II Host Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SII3114CT176 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller |
| SII3114CTU | 制造商:Silicon Image Inc 功能描述:PCI to Serial ATA Controller 176-Pin TQFP 制造商:SILICON 功能描述: |
| SII3124A | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3124ACBHU | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3132 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI Express to 2-Port Serial ATA II Host Controller |
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