參數(shù)資料
型號: SII3114_07
廠商: Silicon Image, Inc.
英文描述: PCI to Serial ATA Controller
中文描述: PCI到Serial ATA控制器
文件頁數(shù): 49/127頁
文件大?。?/td> 598K
代理商: SII3114_07
SiI
3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Internal Register Space – Base Address 1
2007 Silicon Image, Inc.
41
SiI
-DS-0103-D
Access to this register is modified by the “shadow” Channel 0/2 Device Select bit.
These registers are 32-bits wide and define the internal operation of the
SiI
3114. The access types are defined as
follows: R=read, W=write, and C=clearable by some write operation. Access to this register is through the PCI I/O
space. Table 18 shows the internal register space for base 1 addresses.
Table 18.
SiI
3114 Internal Register Space – Base Address 1
Register Name
Address
Offset
31
16
Reserved
15 00
Reserved
Access
Type
00
H
Device Control
Auxiliary Status
Reserved
R/W
Channel 0/2 Task File Register 2
Address Offset: 00
H
Access Type: Read/Write
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved
Device Control
Auxiliary Status
Reserved
Reserved
This register defines one of the Channel 0/2 Task File registers in the
SiI
3114. The register bits are also mapped
to Base Address 5, Offset 88
H
. See “Channel
X
Task File Register 2” section on page 63 for bit definitions. The
value in the “shadow” Channel 0/2 Device Select bit is used to select the Task File registers for either Channel 0
(Master; bit is 0) or Channel 2 (Slave; bit is 1).
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