參數(shù)資料
型號(hào): SI3062-F-FS
廠商: Silicon Laboratories Inc
文件頁數(shù): 53/62頁
文件大?。?/td> 0K
描述: IC DAA ENH FCC LINE-SIDE 16SOIC
標(biāo)準(zhǔn)包裝: 48
功能: 直接存取裝置(DAA)
電路數(shù): 1
電流 - 電源: 9mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 管件
包括: 結(jié)帳音調(diào)檢測(cè),線路電壓監(jiān)視器,回路電流監(jiān)視器,過載檢測(cè),振鈴檢測(cè)器
Si306x
Rev. 0.9
57
8. Pin Descriptions: Si306x
Table 13. Si306x Pin Descriptions
Pin #
Pin Name
Description
1QE
Transistor Emitter.
Connects to the emitter of Q3.
2
DCT
DC Termination.
Provides dc termination to the telephone network.
3RX
Receive Input.
Serves as the receive side input from the telephone network.
4IB
Isolation Capacitor 1B.
Connects to one side of isolation capacitor C1. Used to communicate with the system-
side device.
5C1B
Internal Bias.
Provides internal bias.
6C2B
Isolation Capacitor 2B.
Connects to one side of the isolation capacitor C2. Used to communicate with the
system-side device.
7VREG
Voltage Regulator.
Connects to an external capacitor to provide bypassing for an internal power supply.
8RNG1
Ring 1.
Connects through a resistor to the RING lead of the telephone line. Provides the ring
and caller ID signals to the system-side device.
9RNG2
Ring 2.
Connects through a resistor to the TIP lead of the telephone line. Provides the ring
and caller ID signals to the system-side device.
10
VREG2
Voltage Regulator 2.
Connects to an external capacitor to provide bypassing for an internal power supply.
11
SC
SC Connection.
Enables external transistor network. Should be tied through a 0
resistor to IGND.
12
QE2
Transistor Emitter 2.
Connects to the emitter of transistor Q4.
1
2
3
4
5
6
7
8
9
10
11
12
13
16
15
14
QE
DCT
RX
IB
C1B
C2B
VREG
RNG1
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
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