參數(shù)資料
型號(hào)： SI3062-F-FS
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 51/62頁(yè)
文件大小： 0K
描述： IC DAA ENH FCC LINE-SIDE 16SOIC
標(biāo)準(zhǔn)包裝： 48
功能： 直接存取裝置（DAA）
電路數(shù)： 1
電流 - 電源： 9mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC N
包裝： 管件
包括： 結(jié)帳音調(diào)檢測(cè)，線路電壓監(jiān)視器，回路電流監(jiān)視器，過載檢測(cè)，振鈴檢測(cè)器
Si306x
Rev. 0.9
55
Reset settings = xxxx_xxxx
Register 59. Spark Quenching Control
Bit
D7D6D5D4
D3
D2D1D0
Name
SQ1
SQ0
RG1
GCE
Type
R/W
Bit
Name
Function
7
Reserved Always write this bit to zero.
6
SQ[1:0]
Spark Quenching.
This bit, in combination with the OHS bit (Register 16), and the OHS2 bit (Register 31), sets
the amount of time for the line-side device to go on-hook. The on-hook speeds specified are
measured from the time the OH bit is cleared until loop current equals zero.
Si3061 and Si3063 settings:
OHS
OHS2
SQ[1:0]
Mean On-Hook Speed
0
00
Less than 0.5 ms
0
1
00
3 ms±10% (meets ETSI standard)
1
X
11
26 ms ±10% (meets Australia spark quenching spec)
Si3060, Si3062, and Si3065 settings:
OHS
OHS2
SQ[1:0]
Mean On-Hook Speed
X
XX
Less than 0.5 ms
5
Reserved Always write this bit to zero.
4
SQ[1:0]
Spark Quenching.
This bit, in combination with the OHS bit (Register 16), and the OHS2 bit (Register 31), sets
the amount of time for the line-side device to go on-hook. The on-hook speeds specified are
measured from the time the OH bit is cleared until loop current equals zero.
Si3061 and Si3063 settings:
OHS
OHS2
SQ[1:0]
Mean On-Hook Speed
0
00
Less than 0.5 ms
0
1
00
3 ms±10% (meets ETSI standard)
1
X
11
26 ms ±10% (meets Australia spark quenching spec)
Si3060, Si3062, and Si3065 settings:
OHS
OHS2
SQ[1:0]
Mean On-Hook Speed
X
XX
Less than 0.5 ms
3
Reserved Always write this bit to zero.
2RG1
Receive Gain 1 (Si3064 Line-side Revision E or later).
This bit enables receive path gain adjustment.
0 = No gain applied to hybrid, full scale RX on line = 0 dBm
1 = 1 dB of gain applied to hybrid, full scale RX on line = –1 dBm.
1GCE
Guarded Clear Enable (Si3064 Line-side Revision E or later).
This bit (in conjunction with the R2 bit set to 1), enables the Si306x to meet BT’s Guarded
Clear Spec (B5 6450, Part 1: 1993, Section 15.4.3.3). With these bits set, the DAA will draw
approximately 2.5 mA of current from the line while on-hook.
0 = Default, DAA does not draw loop current.
1 = Guarded Clear enabled, DAA draws 2.5 mA while on-hook to meet Guarded Clear
requirement.
0
Reserved Always write this bit to zero.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI3062-F-FSR 制造商:Silicon Laboratories Inc 功能描述:INTEGRATED DIRECT ACCESS ARRANGEMENT 16SOIC - Tape and Reel
SI3062-X-FS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
SI3063 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
Si3063-F-FS 功能描述:電信線路管理 IC Enhanced V.92 Global Line-Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3063-F-FSR 制造商:Silicon Laboratories Inc 功能描述:INTEGRATED DIRECT ACCESS ARRANGEMENT 16SOIC - Tape and Reel
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