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SAF784X_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
46 of 93
NXP Semiconductors
SAF784x
One chip CD audio device with integrated MP3/WMA decoder
The motor servo consists of a PI filter and a PWM or PDM modulator. When put in a
closed loop, the motor controller can control both speed/frequency and position error
(FIFO fill). It can be operated as a P, I or PI controller, by switching on and off the
appropriate switches (sw1, sw2).
The frequency and position error integrator gain, K
I
and K
F
, and gain G are
programmable. Frequency and filling set points are also programmable.
The frequency input source can be selected between PLL frequency and zero. The
position input source is always FIFO filling.
When operated in a stable operation point in closed loop, the motor controller regulates
the frequency input source and the FIFO filling to their respective set points. This is
implemented by speeding up or slowing down the motor by changing the DC content in
the PDM/PWM output motor signals.
All parameters can be configured by programming the motor registers.
6.5.10.1
Frequency setpoint
When operating the motor in CLV mode, based on EFM, for a certain overspeed, the
motor frequency set point to be programmed is given by:
(6)
where f
clk(sys)
is the system clock frequency and N is the overspeed factor.
The set point can be programmed via register MotorFreqSet. The selection of the motor
frequency input is programmed via MotorGainSet2 bit MOTORFREQSOURCE.
6.5.10.2
Position error
The position error will be used to fine tune the motor speed during Slave mode where the
incoming EFM bit rate is locked on the programmed fixed I
2
S bclk output speed. The set
point must be chosen between 118 and 128, since this is the usable FIFO size in the
decoder. For more information, see
Section 6.5.7.2 on page 37
.
The set point can be programmed via register MotorFifoSet.
6.5.10.3
Motor control loop gains (K
P
, K
F
and K
I
)
The motor control loop gains are all programmable, through registers MotorGainSet1 and
MotorGainSet2. To be able to set integrator bandwidth low enough at high system clock
speeds, an extra divider for the factors K
I
and K
F
is added. These factors can be written
through the register MotorMultiplier.
The resulting K
I(tot)
is then the K
I
multiplied by Ki_mult. The resulting K
F(tot)
is then the K
F
multiplied by Kf_mult. The integrator bandwidth must be scaled with the same factor
Ki_mult.
Notes:
MotorFreqSet
[7:0]
256
1
6
clk sys
)
-------------------------------10
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×
=