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參數資料
| 型號： | SAF7849HL |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 存儲器 |
| 英文描述： | One chip CD audio device with integrated MP3-WMA decoder |
| 封裝： | SAF7843HL/M295<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;SAF7849HL/M245<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.h |
| 文件頁數： | 10/93頁 |
| 文件大小： | 396K |
| 代理商： | SAF7849HL |
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SAF784X_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
10 of 93
NXP Semiconductors
SAF784x
One chip CD audio device with integrated MP3/WMA decoder
Relative gain mismatch is minimized by using carefully scaled circuitry in the
time-continuous parts of the signal path, and by time-sharing circuitry in the time-discrete
parts. A simplified block diagram of the LF acquisition path is shown in
Figure 3
.
The output of the OPU is converted to a current across the input resistor. The current
conveyor provides a low input impedance and a high output impedance and sets a virtual
earth at the end of the voltage-to-current converter to the same voltage as V
ref
(1.6 V).
The level shifter acts as a summing node for the DC cancellation and produces a current
that is referenced to an internal bias voltage which is independent of V
ref
.
The output current charges an integration capacitor C
int
. When the voltage reaches
V
DDA
/ 2, the comparator switches and sends a feedback current that has opposite polarity
to the input current which tries to discharge the capacitor.
The register LFADCGain defines the amount of feedback current and so sets the ADC
gain. A PDM waveform appears at the output of the ADC, and is passed through a
low-pass filter (in the digital domain). The average value at the output of the filter is in
proportion to the voltage between V
i
and V
ref
.
Input signals from the OPU, GPIO inputs and the AUX inputs are routed to eight ADCs
comprising six LF ADCs and two general purpose ADCs. ADCs LF1, LF2, GP1 and GP2
are shared by some of these inputs which are routed via an internal multiplexer. ADC LF1
is shared by input pairs D1, D2, and AUX_L, AUX_R via the multiplexer. ADCs LF3 to LF6
are dedicated to inputs D3, D4, R1 and R2 respectively. ADC GP2 is shared by input pairs
GPIO0, GPIO2, and GPIO1, GPIO3 via the multiplexer. The internal multiplexer is
controlled by register AuxandGPADCControl.
(1) if_auxin_sel = 0: D1 and D2 selected; if_auxin_sel = 1: AUX_L, AUX_R selected.
if_gpio_sel = 0: GPIO0 and GPIO2 selected; if_gpio_sel = 1: GPIO1 and GPIO3 selected.
Fig 3.
LF acquisition block diagram
001aag307
AUX_L, AUX_R,
GPIO1, GPIO3
D1, D2,
GPIO0, GPIO2
current
conveyor
MUX
level
shift
1
0
(1)
d, s, gp_bipolar_sel
register LFControl
internal
reference1
compin
V
DD
V
SS
comp_ref_sel[1:0]
register LFControl
internal reference 2
fsl (clock)
dx_pdm
D1Offset; D2Offset
GP1Offset; GP2Offset
LFADCGain
GenPurpGain
Cint
DC compensation
DAC
feedback
DAC
feedback switch
V
ref
anti-alias filter
(only used on
GP inputs)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SAF7849HL/M245,557 | 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| SAF7849HL/M295,557 | 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| SAF7860HL/M2,557 | 制造商:NXP Semiconductors 功能描述:DSP |
| SAF82520PVB2 | 制造商:SIEMENS 功能描述:New |
| SAF82525 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Data Communications ICs |
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