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參數(shù)資料
| 型號： | SAA7780 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | ThunderBird Q3DE PCI Audio Accelerator(雷鳥 Q3DE PCI音頻加速器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | 28 X 28 MM, 3.42 MM HEIGHT, PLASTIC, QFP-160 |
| 文件頁數(shù)： | 63/70頁 |
| 文件大?。?/td> | 348K |
| 代理商： | SAA7780 |
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ThunderBird Q3D PCI Audio
Accelerator
SAA7780
Philips Semiconductors
Product Specification
1999 Sep 30
63
MAX_LAT Register - MAXLAT (RO)
Multimedia Timer
Overview
The Multimedia Timer is a 20 bit, 1 microsecond resolution timer that is used for game audio/video synchronization. The
timer subsystem consists of the actual 20-bit timer and I/O space registers to report the status and count.
In a hypothetical operation, the multimedia timer is started at the end of a set of audio commands. The timer then starts
counting while the game control will play its video frames. If the system interrupts the video while the audio is playing,
the game application can read to multimedia timer to see which video frame should be displayed and make corrections
as necessary. The counter value must be read in three PS bus cycles.
The 1-uS resolution timer will get its time base from dividing down the OSC clock. An interrupt and flag is provided to
determine if the timer count has rolled over. The timer can either start from zero or be preloaded with a start value. Only
8 bit accesses are allowed to this device.
POR Value
0
0
0
0
0
0
0
0
Bit
Name
R/W
Function
7:0
MINGNT
RO
Minimum grant specifies how long of a burst period the device needs
assuming a clock speed of 33MHz. Since the SAA7780, function 2, is a
target only, this register is read only and set to zero.
PCI CFG 2
D7
D6
D5
D4
D3
D2
D1
D0
Offset 3Fh
MAXLAT[7:0]
POR Value
0
0
0
0
0
0
0
0
Bit
Name
R/W
Function
7:0
MAXLAT
RO
Maximum latency specifies how often a device needs to gain access to the
PCI bus. The SAA7780, function 2, is a target only, this register is read only
and set to zero.
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