參數(shù)資料
型號: SAA7118H
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Multistandard video decoder with adaptive comb filter and component video input
中文描述: COLOR SIGNAL DECODER, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, MS-022, SOT322-2 , QFP-160
文件頁數(shù): 134/169頁
文件大?。?/td> 665K
代理商: SAA7118H
2001 May 30
134
Philips Semiconductors
Preliminary specification
Multistandard video decoder with adaptive
comb filter and component video input
SAA7118
15.3
Programming register RGB/Y-P
B
-P
R
component input processing
15.3.1
S
UBADDRESS
23H
Table 67
Analog input control 5 (AICO5); 23H[7:4] and 23H[2:0]
15.3.2
S
UBADDRESS
24H
Table 68
Analog input control 6 (AICO6): static gain control channel 3; 23H[0] and 24H[7:0]
15.3.3
S
UBADDRESS
25H
Table 69
Analog input control 7 (AICO7): static gain control channel 4; 23H[1] and 25H[7:0]
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D7
D6
analog output select
AD port output enable
AOSL2
ADPE
see Table 59
0
1
0
AD port is set to 3-state
AD port is enabled
all ADCs are clocked by the internal generated line-locked
clock
all ADCs are clocked by the external input clock on CLKEXT
clamping is dependent on HLNRS[03H[6]]
reference selection (input signal is pulled into ADC range)
disabled
enabled (any slope on EXMCLR input will reset the internal
gain control loop)
see Table 69
D5
ADC clock selector
EXCLK
1
0
1
0
1
D4
clamping/reference
selection for all ADCs
REFA
D2
enable external source
switch indicator input
EXMCLR
EXMCE
D1
static gain control channel 2
sign bit
static gain control channel 1
sign bit
GAI48
D0
GAI38
see Table 68
DECIMAL
VALUE
GAIN
(dB)
SIGN BIT
23H[0]
CONTROL BITS D7 TO D0
GAI38
GAI37
GAI36
GAI35
GAI34
GAI33
GAI32
GAI31
GAI30
0...
...144
145...
...511
3
0
0
+6
0
0
0
1
0
1
1
1
0
0
0
1
0
0
0
1
0
1
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
1
DECIMAL
VALUE
GAIN
(dB)
SIGN BIT
23H[1]
CONTROL BITS D7 TO D0
GAI48
GAI47
GAI46
GAI45
GAI44
GAI43
GAI42
GAI41
GAI40
0...
...144
145...
...511
3
0
0
+6
0
0
0
1
0
1
1
1
0
0
0
1
0
0
0
1
0
1
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
1
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