參數(shù)資料
型號: SAA4978
廠商: NXP Semiconductors N.V.
英文描述: Picture Improved Combined Network PICNIC
中文描述: 圖片改進聯(lián)合網(wǎng)絡(luò)野餐
文件頁數(shù): 42/56頁
文件大?。?/td> 296K
代理商: SAA4978
1999 May 03
42
Philips Semiconductors
Product specification
Picture Improved Combined Network
(PICNIC)
SAA4978H
HA and VA (horizontal and vertical sync input)
V
IL
V
IH
LOW-level input voltage
HIGH-level input voltage
0
2.0
0.8
5.5
V
V
AC characteristics parallel bus: P0, P2, ALE and PSEN (external ROM access);
see Fig.8
t
W(ALE)
t
AVLL
t
LLAX
ALE pulse width
address valid to ALE LOW
address hold after ALE
LOW
ALE LOW to instruction
input
ALE LOW to PSEN LOW
PSEN pulse width
PSEN LOW to valid
instruction input
input instruction hold after
PSEN
input instruction float after
PSEN
address to valid
instruction input
PSEN LOW to address
float
17
20
62.5
ns
ns
ns
t
LLIV
96
ns
t
LLPL
t
W(PSEN)
t
PLIV
31.25
93.75
60
ns
ns
ns
t
PXIX
0
ns
t
PXIZ
30
ns
t
AVIV
128
ns
t
PLAZ
10
ns
DC characteristics microcontroller pins: P0, P1, INT0, INT1, T0, T1, RSTW, RSTR, SNDA, SNCL, ALE,
PSEN and EA
I
OH
=
0.06 mA
V
OL
LOW-level output voltage
I
OL
= 1.6 mA
V
IL
LOW-level input voltage
V
IH
HIGH-level input voltage
I
LI
input leakage current
C
I/O
pin capacitance
V
OH
HIGH-level output voltage
2.4
0
2.0
0.4
0.8
5.5
±
10
10
V
V
V
V
μ
A
pF
Analog Y, U and V input filters (3rd-order linear phase filter with notch at f
CLK
);
see Fig.6
f
(
3dB)
α
(0.5)
3 dB down frequency
attenuation at
1
2
f
CLK
(8 MHz)
stop band attenuation
(after notch)
notch frequency
group delay
5.4
7
5.6
8
5.8
MHz
dB
α
sb
32
dB
f
notch
t
d(g)
tuned to
1
2
f
CLK
at 4 MHz signal frequency
15.3
52
16
55
16.7
58
MHz
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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