參數(shù)資料
型號: SAA4978
廠商: NXP Semiconductors N.V.
英文描述: Picture Improved Combined Network PICNIC
中文描述: 圖片改進(jìn)聯(lián)合網(wǎng)絡(luò)野餐
文件頁數(shù): 38/56頁
文件大小: 296K
代理商: SAA4978
1999 May 03
38
Philips Semiconductors
Product specification
Picture Improved Combined Network
(PICNIC)
SAA4978H
α
ct
crosstalk between inputs
and outputs
f = 0 to 1 MHz;
Z
source
= 200
f = 1 to 5 MHz;
Z
source
= 200
50
dB
44
dB
Input clamp processing (Y clamp level digital 32; U and V clamp level digital 0 in twos complement)
E
clamp(stat)(Y)
static clamp error in
Y channel
static clamp error in
UV channel
dynamic clamp error
clamping capacitance
source resistance
maximum clamp current
maximum drift in one line
period
Y input clamping voltage
5.0
+2.0
LSB
E
clamp(stat)(UV)
digital correction circuit off
3.0
+3.0
LSB
E
clamp(dyn)
C
clamp
R
source
I
clamp(max)
Tilt
average value (1
σ
)
10
160
22
0.25
350
+160
0.25
LSB
nF
μ
A
LSB
V
i(clamp)(Y)
over complete AGC range
600
mV
Input transfer functions (sample rate 16 MHz; 9 bits);
see Fig.7
f
i(s)(max)
maximum input sample
frequency
duty factor of (internal)
clock cycle
DC integral non linearity
18
MHz
δ
clk
40
60
%
INL
ramp input signal; AGC
on; filters off
ramp input signal; note 2
2
+2
LSB
DNL
DC differential non
linearity
overall signal-to-noise
ratio (no harmonics) from
input to output
differential phase in
U and V
differential gain in Y
front-end
differential phase in Y
front-end
supply voltage ripple
rejection
0.99
+0.99
LSB
SNR
note 3
50
52
dB
Φ
diff(UV)
1
2.5
deg
G
diff(Y)
Y within 0.2 to 0.75 V
1.5
%
Φ
diff(Y)
Y within 0.2 to 0.75 V
1
deg
SVRR
filters off; note 4
35
dB
PLL function (base frequency 32 MHz)
σ
line-line
sigma value of line-to-line
jitter
σ
field-field
sigma value of
field-to-field jitter
f
unlock
frequency in unlocked
state
locked to stable HA;
note 5
locked to stable HA;
note 5
0.4
1.0
ns
0.4
1.0
ns
30.7
32
33.3
MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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