參數(shù)資料
型號(hào): S71GL128NB0
廠商: Spansion Inc.
英文描述: Stacked Multi-chip Product (MCP)
中文描述: 堆疊式多芯片產(chǎn)品(MCP)
文件頁(yè)數(shù): 76/147頁(yè)
文件大?。?/td> 1655K
代理商: S71GL128NB0
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)當(dāng)前第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)
76
S29GLxxxN MirrorBit
TM
Flash Family
S29GLxxxN_00_A4 June 14, 2004
A d v a n c e I n f o r m a t i o n
Table 12. Write Operation Status
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program, Embedded Erase, or Write-to-Buffer operation has exceeded the
maximum timing limits. Refer to the section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for
further details.
3. The Data# Polling algorithm should be used to monitor the last loaded write-buffer address location.
4. DQ1 switches to ‘1’ when the device has aborted the write-to-buffer operation
Absolute Maximum Ratings
Storage Temperature, Plastic Packages. . . . . . . . . . . . . . . . –65°C to +150°C
Ambient Temperature with Power Applied . . . . . . . . . . . . . . –65°C to +125°C
Voltage with Respect to Ground:
V
CC
(Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +4.0 V
V
IO
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +4.0 V
A9, OE#, ACC and RESET# (Note 2) . . . . . . . . . . . . .–0.5 V to +12.5 V
All other pins (Note 1). . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
+12.5 V
Output Short Circuit Current (Note 3). . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Notes:
1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs
or I/Os may overshoot V
SS
to –2.0 V for periods of up to 20 ns. See
Figure 7
.
Maximum DC voltage on input or I/Os is V
CC
+ 0.5 V. During voltage transitions,
input or I/O pins may overshoot to V
CC
+ 2.0 V for periods up to 20 ns. See
Figure
8
.
2. Minimum DC input voltage on pins A9, OE#, ACC, and RESET# is –0.5 V. During
voltage transitions, A9, OE#, ACC, and RESET# may overshoot V
SS
to –2.0 V for
periods of up to 20 ns. See
Figure 7
. Maximum DC input voltage on pin A9, OE#,
ACC, and RESET# is +12.5 V which may overshoot to +14.0V for periods up to 20
ns.
3. No more than one output may be shorted to ground at a time. Duration of the short
circuit should not be greater than one second.
4. Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
Status
DQ7
(Note 2)
DQ6
DQ5
(Note 1)
DQ3
DQ2
(Note 2)
DQ1
RY/
BY#
Standard
Mode
Embedded Program Algorithm
DQ7#
Toggle
0
N/A
No toggle
0
0
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
N/A
0
Program
Suspend
Mode
Program-
Suspend
Read
Program-Suspended
Sector
Invalid (not allowed)
1
Non-Program
Suspended Sector
Data
1
Erase
Suspend
Mode
Erase-
Suspend
Read
Erase-Suspended
Sector
1
No toggle
0
N/A
Toggle
N/A
1
Non-Erase
Suspended Sector
Data
1
Erase-Suspend-Program
(Embedded Program)
DQ7#
Toggle
0
N/A
N/A
N/A
0
Write-to-
Buffer
Busy (Note 3)
DQ7#
Toggle
0
N/A
N/A
0
0
Abort (Note 4)
DQ7#
Toggle
0
N/A
N/A
1
0
相關(guān)PDF資料
PDF描述
S71GL256NB0 Stacked Multi-chip Product (MCP)
S71GL512NB0 Stacked Multi-chip Product (MCP)
S71GS256NC0BFWAK0 128N based MCPs
S71GS128NB0 128N based MCPs
S71GS128NB0BAWAK0 128N based MCPs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S71GL128NC0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Product (MCP)
S71GL256NB0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Product (MCP)
S71GL256NC0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Product (MCP)
S71GL512NB0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Product (MCP)
S71GL512NC0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Product (MCP)