參數(shù)資料
型號: S6D0114
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 132 RGB X 176 DOT 1-CHIP DRIVER IC WITH INTERNAL GRAM FOR 262,144 Colors TFT-LCD
中文描述: 132的RGB × 176交通部1 -芯片驅動器集成電路的26萬色TFT內部革蘭氏液晶顯示器
文件頁數(shù): 45/143頁
文件大?。?/td> 1919K
代理商: S6D0114
S6D0114 132-RGB X 176-DOT 1-CHIP DRIVER IC FOR 262,144-COLOR TFT-LCD DISPLAY
Preliminary
45
Depending on the external display interface setting, differnet interfaces for use can be specified to match the display
state. While displaying moving pictures (RGB interface/VSYNC interface), the data for display can be written in
high-speed write mode, which achieves both low power consumption and high-speed access.
Table 22. Display State and Interface
Display State
Operation Mode
RAM Access (RM)
Display Operation Mode
(DM1-0)
Internal clock
(DM1-0=00)
RGB interface
(DM1-0=01)
RGB interface
(DM1-0=01)
VSYNC interface
(DM1-0=10)
Still Pictures
Internal Clock
System interface
(RM=0)
RGB interface
(RM=1)
System interface
(RM=0)
System interface
(RM=0)
Motion Pictures
RGB interface (1)
Rewrite still picture area while
displaying motion pictures
RGB interface (2)
Motion Picture Display
VSYNC interface
NOTE:
1) The instruction register can only be set through the system interface.
2) Switching between RGB interface and VSYNC interface cannot be done.
3) The RGB interface mode should not be set during operation.
4) For the transition flow for each operation mode, see the External Display Interface section.
5) RGB interface and VSYNC interface should be used in high-speed write mode (HWM=1).
Internal Clock Mode
All display operation is controlled by signals generated by the internal clock in internal clock mode.
All inputs through the external display interface are invalid. The internal RAM can be accessed only via the system
interface.
RGB Interface Mode (1)
The display operations are controlled by the frame synchronization clock (VSYNC), raster-row synchronization
signal (VSYNC), and dot clock (DCLK) in RGB interface mode. These signals should be supplied during display
operation in this mode.
The display data is transferred to the internal RAM via PD17-0 for each pixel. Combining the function of the high-
speed write mode and the window address enables display of both the motion picture area and the internal RAM
area simultaneously. In this method, data is only transferred when the screen is updated, which reduces the amount
of data transferred.
The periods of the front (FP), back (BP) porch, and the display are automatically generated in the S6D0114 by
counting the raster-row synchronization signal (HSYNC) based on the frame synchronization signal (VSYNC).
RGB Interface Mode (2)
When RGB interface is in use, data can be written to RAM via the system interface. This write operation should be
performed while data for display is not being transferred via RGB interface (ENABLE = low). Before the next data
transfer for display via RGB interface, the setting above should be changed, and then the address and index (R22h)
should be set.
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