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參數(shù)資料
| 型號： | S29PL032J |
| 廠商： | Spansion Inc. |
| 英文描述： | CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| 中文描述： | 3.0伏的CMOS只，同步讀/寫閃存與增強VersatileIO控制記憶 |
| 文件頁數(shù)： | 77/106頁 |
| 文件大?。?/td> | 1997K |
| 代理商： | S29PL032J |
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April 7, 200531107A62
S29PL127J/S29PL129J/S29PL064J/S29PL032J
75
P R E L I M I N A R Y
After an erase command sequence is written, if all sectors selected for erasing
are protected, Data# Polling on DQ7 is active for approximately 400 μs, then the
bank returns to the read mode. If not all selected sectors are protected, the Em-
bedded Erase algorithm erases the unprotected sectors, and ignores the selected
sectors that are protected. However, if the system reads DQ7 at an address within
a protected sector, the status may not be valid.
When the system detects DQ7 has changed from the complement to true data,
it can read valid data at DQ15–DQ0 on the
following
read cycles. Just prior to the
completion of an Embedded Program or Erase operation, DQ7 may change asyn-
chronously with DQ15–DQ0 while Output Enable (OE#) is asserted low. That is,
the device may change from providing status information to valid data on DQ7.
Depending on when the system samples the DQ7 output, it may read the status
or valid data. Even if the device has completed the program or erase operation
and DQ7 has valid data, the data outputs on DQ15–DQ0 may be still invalid. Valid
data on DQ15–DQ0 will appear on successive read cycles.
Table 23
shows the outputs for Data# Polling on DQ7. 6 shows the Data# Polling
algorithm. 18 in the "
AC Characteristic
" section section shows the Data# Polling
timing diagram.
Notes:
1. VA = Valid address for programming. During a sector erase operation, a valid address is
any sector address within the sector being erased. During chip erase, a valid address is
any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously
with DQ5.
Figure 6.
Data# Polling Algorithm
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ7–DQ0
Addr = VA
Read DQ7–DQ0
Addr = VA
DQ7 = Data
START
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29PL129J | CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| S29PL064J | CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| S29PL127J | CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| S29PL127J55 | CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| S29PL127J60 | CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29PL032J55BAI120 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 32Mbit 2M x 16bit 55ns 48-Pin FBGA Tray 制造商:Spansion 功能描述:FLASH PARALLEL - Trays |
| S29PL032J55BFI120 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 32MBIT 2MX16 55NS 48FBGA - Trays |
| S29PL032J60BFI120 | 制造商:Spansion 功能描述: |
| S29PL032J60BFI120(E) | 制造商:Spansion 功能描述:Cut Tape |
| S29PL032J70BAI120 | 功能描述:閃存 32Mb 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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