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參數(shù)資料
| 型號(hào)： | S29GL128N10FAI010 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| 中文描述： | 8M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封裝： | 13 X 11 MM, FBGA-64 |
| 文件頁(yè)數(shù)： | 58/100頁(yè) |
| 文件大?。?/td> | 952K |
| 代理商： | S29GL128N10FAI010 |
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56
S29GL-N MirrorBit Flash Family
S29GL-N_00_B3 October 13, 2006
D a t a S h e e t
as in the standard program operation. See
Write Operation Status on page 67
for more
information.
The system must write the Program Resume command (address bits are don’t care) to exit
the Program Suspend mode and continue the programming operation. Further writes of the
Resume command are ignored. Another Program Suspend command can be written after the
device has resume programming.
Figure 3. Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writ-
ing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are
then followed by the chip erase command, which in turn invokes the Embedded Erase algo-
rithm. The device does
not
require the system to preprogram prior to erase. The Embedded
Erase algorithm automatically preprograms and verifies the entire memory for an all zero data
pattern prior to electrical erase. The system is not required to provide any controls or timings
during these operations.
Table 12 on page 63
and
Table 14 on page 65
show the address and
data requirements for the chip erase command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and
addresses are no longer latched. The system can determine the status of the erase operation
by using DQ7, DQ6, or DQ2. Refer to
Write Operation Status on page 67
for information on
these status bits.
Any commands written during the chip erase operation are ignored, including erase suspend
commands. However, note that a
hardw are reset
immediately terminates the erase opera-
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μ
s
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL128N10FAI012 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10FAI013 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10FAI020 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10FAI022 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| S29GL128N10FAI023 | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL128N10FFI010 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 128Mbit 16M/8M x 8bit/16bit 100ns 64-Pin Fortified BGA Tray 制造商:Spansion 功能描述:MIRRORBIT FLASH 128MB SMD 29LV128 |
| S29GL128N10FFI020 | 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL128N10TF101 | 制造商:Spansion 功能描述: |
| S29GL128N10TFI010 | 功能描述:IC FLASH 制造商:cypress semiconductor corp 系列:GL-N 包裝:托盤 零件狀態(tài):在售 存儲(chǔ)器類型:非易失 存儲(chǔ)器格式:閃存 技術(shù):FLASH - NOR 存儲(chǔ)容量:128Mb （16M x 8，8M x 16） 寫周期時(shí)間 - 字，頁(yè):100ns 訪問(wèn)時(shí)間:100ns 存儲(chǔ)器接口:并聯(lián) 電壓 - 電源:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商器件封裝:56-TSOP 標(biāo)準(zhǔn)包裝:91 |
| S29GL128N10TFI020 | 制造商:Spansion 功能描述:S29GL128N10TFI020 制造商:Spansion 功能描述:Flash - NOR IC |
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