參數(shù)資料
型號(hào): S29GL128N10FAI010
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology
中文描述: 8M X 16 FLASH 3V PROM, 100 ns, PBGA64
封裝: 13 X 11 MM, FBGA-64
文件頁(yè)數(shù): 52/100頁(yè)
文件大?。?/td> 952K
代理商: S29GL128N10FAI010
50
S29GL-N MirrorBit Flash Family
S29GL-N_00_B3 October 13, 2006
D a t a S h e e t
Command Definitions
Writing specific address and data commands or sequences into the command register initiates
device operations.
Table 12 on page 63
and
Table 14 on page 65
define the valid register
command sequences.
Writing incorrect address and data values or writing them in the im-
proper sequence may place the device in an unknown state.
A reset command is then
required to return the device to reading array data.
All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data
is latched on the rising edge of WE# or CE#, whichever happens first. Refer to the AC Char-
acteristics section for timing diagrams.
Reading Array Data
The device is automatically set to reading array data after device power-up. No commands
are required to retrieve data. The device is ready to read array data after completing an Em-
bedded Program or Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the device enters the erase-sus-
pend-read mode, after which the system can read data from any non-erase-suspended
sector. After completing a programming operation in the Erase Suspend mode, the system
may once again read array data with the same exception. See the Erase Suspend/Erase Re-
sume Commands section for more information.
The system
must
issue the reset command to return the device to the read (or erase-sus-
pend-read) mode if DQ5 goes high during an active program or erase operation, or if the
device is in the autoselect mode. S ee the next section, Reset Command, for more
information.
See also
“Requirements for Reading Array Data” section on page 14
for more information.
The Read-Only Operations subsection in the
“AC Characteristics” section on page 77
section
provides the read parameters, and
Figure 11, on page 78
shows the timing diagram.
Reset Command
Writing the reset command resets the device to the read or erase-suspend-read mode. Ad-
dress bits are don’t cares for this command.
The reset command may be written between the sequence cycles in an erase command se-
quence before erasing begins. This resets the device to the read mode. Once erasure begins,
however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in a program command se-
quence before programming begins. This resets the device to the read mode. If the program
command sequence is written while the device is in the Erase Suspend mode, writing the
reset command returns the device to the erase-suspend-read mode. Once programming be-
gins, however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in an autoselect command
sequence. Once in the autoselect mode, the reset command must be written to return to the
read mode. If the device entered the autoselect mode while in the Erase Suspend mode, writ-
ing the reset command returns the device to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation, writing the reset command returns the
device to the read mode (or erase-suspend-read mode if the device was in Erase Suspend).
Note that if DQ1 goes high during a Write Buffer Programming operation, the system must
write the Write-to-Buffer-Abort Reset command sequence to reset the device for the next
operation.
相關(guān)PDF資料
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S29GL128N10FAI012 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology
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