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參數(shù)資料
| 型號(hào)： | RM5231A-250-H |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| 中文描述： | 64-BIT, 250 MHz, MICROPROCESSOR, PQFP128 |
| 封裝： | MQFP-128 |
| 文件頁數(shù)： | 29/40頁 |
| 文件大?。?/td> | 595K |
| 代理商： | RM5231A-250-H |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002174, Issue 2
29
RM5231A Microprocessor with 32-Bit System Bus Data Sheet
Preliminary
Table 9 Initialization Interface
Table 10 Power Supply
Note
1.
An "*" at the end of the signal name denotes active low.
Pin Name
Type
Description
BigEndian
Input
Allows the system to change the processor addressing mode without
rewriting the mode ROM.
Vcc is OK
When asserted, this signal indicates to the RM5231A that both power
supplies has been above the recommended value for more than 100
milliseconds and remains stable. The assertion of VccOK initiates the
reading of the boot-time mode control serial stream.
Cold reset
This signal must be asserted for a power on reset or a cold reset.
ColdReset must be de-asserted synchronously with SysClock.
Reset
This signal must be asserted for any reset sequence. It may be
asserted synchronously or asynchronously for a cold reset, or
synchronously to initiate a warm reset. Reset must be de-asserted
synchronously with SysClock.
Boot mode clock
Serial boot-mode data clock output at the system clock frequency
divided by 256
Boot mode data in
Serial boot-mode data input.
VccOK
Input
ColdReset*
Input
Reset*
Input
ModeClock
Output
ModeIn
Input
Pin Name
Type
Description
VccInt
VccIO
Vss
Input
Input
Input
Power supply for core.
Power supply for I/O.
Ground return.
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| RM5231A-300-H | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
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| RM5231A-350-H | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
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