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參數(shù)資料
| 型號： | RM5231A-250-H |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| 中文描述： | 64-BIT, 250 MHz, MICROPROCESSOR, PQFP128 |
| 封裝： | MQFP-128 |
| 文件頁數(shù)： | 24/40頁 |
| 文件大小： | 595K |
| 代理商： | RM5231A-250-H |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002174, Issue 2
24
RM5231A Microprocessor with 32-Bit System Bus Data Sheet
Preliminary
Figure 7 Processor Block Read
Figure 8 Processor Block Write
3.26 Enhanced Write Modes
The RM5231A implements two enhancements to the original R4000 write mechanism: Write
Reissue and Pipeline Writes. The original R4000 allowed a write address cycle on the
SysAD
bus
only once every four SysClock cycles. Hence for a non-block write, this meant that two out of
every four cycles were wait states.
Pipelined write mode eliminates these two wait states by allowing the processor to drive a new
write address onto the bus immediately after the previous write data cycle. This allows for higher
SysAD
bus utilization. However, at high bus frequencies the processor may drive a subsequent
write onto the bus prior to the time the external agent deasserts
WrRdy*
, indicating that it can not
accept another write cycle. This can cause the write cycle to be missed.
Write reissue mode is an enhancement to pipelined write mode and allows the processor to reissue
missed write cycles. If
WrRdy*
is deasserted during the issue phase of a write operation, the cycle
is aborted by the processor and reissued at a later time.
SysClock
SysAD
SysCmd
ValidOut*
ValidIn*
RdRdy*
WrRdy*
Release*
Addr
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
Read
NData
NData
NData
NData
NData
NData
NData
NEOD
SysClock
SysAD
SysCmd
ValidOut*
ValidIn*
RdRdy*
WrRdy*
Release*
Addr
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
Write
NData
NData
NData
NData
NData
NData
NData
NEOD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RM5231A-300-H | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| RM5231A-300-HI | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| RM5231A-350-H | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| RM5261A | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
| RM5261A-250-H | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RM525A-R2 | 制造商:Black Box Corporation 功能描述:2U Wallmount Cabinet, Beige |
| RM5260-133Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5260-150Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5260-175Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5260-200Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
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