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– The POR33 must be masked to avoid spurious resets when the power is back. This
must also be done when POR33 is disabled, as POR33 will be enabled
automatically when the device wakes up from Shutdown mode. Disable the POR33
by writing a one to the POR33MASK bit in the SCIF.VREGCR register. Due to
internal synchronisation, this bit must be read as a one before the sleep instruction is
executed by the CPU. Refer to the System Control Interface (SCIF) chapter for more
details.
– The 32KHz RC oscillator (RC32K) must be running and stable. This is done by
writing a one to the EN bit in the SCIF.RC32KCR register. Due to internal
synchronisation, this bit must be read as a one to ensure that the oscillator is stable
before the sleep instruction is executed by the CPU.
As soon as the Shutdown sleep mode is entered, all CPU and peripherals are reset to ensure a
consistent state. POR33 and RC32K are automatically disabled to save extra power.
12.6.4.3
Leaving Shutdown sleep mode
Exiting Shutdown sleep mode can be done by the events described in
Table 12-5.When a wake-up event occurs, the regulator is turned on and the device will wait for VDDCORE
to be valid before starting. The Sleep Reset bit in the Reset Cause register (RCAUSE.SLEEP) is
then set, allowing software running on the device to distinguish between the first power-up and a
wake-up from Shutdown mode.
12.6.4.4
Special consideration regarding waking up from Shutdown sleep mode using the WAKE_N pin
By default, the WAKE_N pin will only wake the device up if it is pulled low after entering Shut-
down mode. If the WAKE_N is pulled low before the Shutdown mode is entered, it will not wake
the device from the Shutdown sleep mode. In order to wake the device by pulling WAKE_N low
before entering Shutdown mode, the user has to write a one to the bit corresponding to the
WAKEN wake-up source in the AWEN register. In this scenario, the CPU execution will proceed
with the next instruction, and the RCAUSE register content will not be altered.
12.6.5
Divided PB Clocks
The clock generator in the Power Manager provides divided PBx clocks for use by peripherals
that require a prescaled PBx clock. This is described in the documentation for the relevant mod-
ules. The divided clocks are directly maskable, and are stopped in sleep modes where the PBx
clocks are stopped.
Table 12-5.
Events That Can Wake up the Device from Shutdown Mode
Source
How
PA11 (WAKE_N)
Pulling-down PA11 will wake up the device
RESET_N
Pulling-down RESET_N pin will wake up the device
The device is kept under reset until RESET_N is tied high
again
AST
OSC32K must be set-up to use alternate pinout (XIN32_2
and XOUT32_2) Refer to the SCIF Chapter
AST must be configured to use the clock from OSC32K
AST must be configured to allow alarm, periodic, or
overflow wake-up