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32099I–01/2012
AT32UC3L016/32/64
19.8
Module Configuration
The specific configuration for each USART instance is listed in the following tables.The module
bus clocks listed here are connected to the system bus clocks. Please refer to the Power Man-
ager chapter for details.
Table 19-19. USART Configuration
Feature
USART0
USART1
USART2
USART3
Receiver Time-out Counter Size
(Size of the RTOR.TO field)
17 bit
DIV Value for divided CLK_USART
8
Table 19-20. USART Clocks
Module Name
Clock Name
Description
USART0
CLK_USART0
Clock for the USART0 bus interface
USART1
CLK_USART1
Clock for the USART1 bus interface
USART2
CLK_USART2
Clock for the USART2 bus interface
USART3
CLK_USART3
Clock for the USART3 bus interface
Table 19-21. Register Reset Values
Register
Reset Value
VERSION
0x00000440