參數(shù)資料
型號(hào)： QT0086202TME
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù)： 24/62頁(yè)
文件大小： 268K
代理商： QT0086202TME
82C814
Page 14
January 08, 1998
912-3000-047
Revision: 1.0
OPTi
The logic implements several functional blocks that interact
as indicated. The functional blocks shown in the diagram are
briefly described below.
The 82C814 takes its control, address, and data informa-
tion from its
primary PCI bus
, which is usually controlled
by the host PCI interface but can also be controlled by a
master on the docking interface.
The 82C814 logic implements a
PCI-to-PCI (Card Bus)
bridge
controlled by
PCI Configuration Registers.
These
configuration registers are accessed from the primary PCI
bus. Any bus master, including a master on the docking
interface, can program these registers. The PCI Configura-
tion Registers consist of standard CardBus registers at
indexes 00h-47h and OPTi 82C814 architecture-specific
registers at indexes 48h-FFh. Settings in these registers
control host interface operations, select architecture-spe-
cific settings such as interrupt routing to the host, and pro-
vide PCI status to the host on request. The register set is
accessed as PCI Function 0 of the 82C814 device.
The PCI-to-PCI bridge serves to connect the primary PCI
bus to an independent secondary PCI bus. It is this sec-
ondary bus that interfaces externally to a docking station. If
no dock is attached, software can still access the configu-
ration registers for the bridge.
The
bus arbiter logic
takes master requests for bus own-
ership for the purpose of giving PCI master control to one
of the secondary PCI buses.
Devices connected to the docking interface can transmit
interrupts to the host system directly or through serial
IRQs. Docking station PCI devices can generate INTA#,
INTB#, INTC#, and INTD# which the 82C814 logic con-
verts to an interrupt.
Clock generation logic
is provided to use either the pri-
mary PCICLK input for synchronous operation, or an
external clock input for asynchronous operation. Four sep-
arate output clocks are provided, and can be skew-com-
pensated to adjust for varying board trace lengths.
The logic subsystems of the 82C814 Docking Station Con-
troller are described in detail in the following sections.
4.4
The 82C814 logic includes attachment detection logic and a
power control state machine to determine what type of dock
has been attached to the docking interface.
Device Type Detection Logic
The power control state machine follows the algorithm pro-
vided by the CardBus specification, with a slight modification
for docking station detection. Table 4-1 lists the device deter-
mination rules. Although the state machine follows the rules
for CardBus device detection, only docking stations are con-
sidered valid attachments.
Table 4-1
Device Detection (CardBus Rules)
CCD2#
CCD1#
CVS2
CVS1
Key
Card Type
GND
Short to CVS1
Open
Short to CCD1#
LV
3.3V CardBus
Short to CVS2
GND
Short to CCD2#
GND
LV
3.3/x.xV CardBus
Short to CVS1
GND
GND
Short to CCD2#
LV
3.3/x.x/y.yV CardBus
Short to CVS2
GND
Short to CCD2#
Open
LV
x.xV CardBus
GND
Short to CVS2
Short to CCD1#
Open
LV
x.x/y.yV CardBus
Short to CVS1
GND
Open
Short to CCD2#
LV
y.yV CardBus
GND
Short to CVS1
GND
Short to CCD1#
--
3.3V Docking Station
GND
Short to CVS2
Short to CCD1#
GND
--
5.0V Docking Station
GND
GND
Open
Open
5.0V
5.0V PCMCIA
GND
GND
Open
GND
LV
3.3V PCMCIA
GND
GND
Open
GND
5.0V
3.3/5.0V PCMCIA
GND
GND
GND
Open
LV
x.xV PCMCIA
GND
GND
GND
GND
LV
x.x/3.3V PCMCIA
GND
GND
GND
GND
5.0V
x.x/3.3/5.0V PCMCIA
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