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參數(shù)資料
| 型號： | QT0086202TME |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 21/62頁 |
| 文件大?。?/td> | 268K |
| 代理商： | QT0086202TME |
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82C814
912-3000-047
Revision: 1.0
Page 11
January 08, 1998
OPTi
3.4
The 82C814 slot interfaces are provided with pull-up and pull-down resistors internal to the chip. The resistors are active at the
times indicated in Table 3-5.
Internal Resistors
Table 3-5 refers to the chip state with no card inserted, a powered-down card inserted, or a docking station attached.
Figure 3-2 shows the functional timing relationships of software power-up and reset commands to the signals output by the
power cycle state machine.
Table 3-5
Internal Keeper Resistor Scheme
Figure 3-2
Power-Up Timing
Signal Group
82C814 Action with
No Attachment
82C814 Action after
Detecting Docking Station
Dock Detect:
CCD1-2#
Pull up to core VCC to detect dock
insertion/removal
Pull up to core VCC
Address/Data:
CAD[31:0]
CC/BE[3:0]#
CPAR
Pull down
Pull down until interface is powered up
Reset:
CRST#
Driven low
Driven according to PCICFG 3Eh[6]
Frame:
CFRAME#
Pull down
None
PCI Control/Status:
CIRDY#
CTRDY#
CDEVSEL#
CSTOP#
CPERR#
CBLOCK#
Pull down
None
Clock:
CCLK[3:0]
Pull down
Disable pull-down (clock input is
always driven)
Request:
CREQ[3:0]#
Pull up to card VCC
None
Open Drain:
CSERR#
Pull up to card VCC
None
Software writes CardBus 010h[5:4] = 11 (3.3V select)
Pull-downs disabled
VCC3 output signal
CardBus 000h[3] = 1 (power cycle complete)
Pull-ups enabled, Output signals are driven
Software sees power cycle complete,
writes PCICFG 3Eh = 0 (deassert CRST#)
CRST#
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