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參數(shù)資料
| 型號： | PowerPC 750CX |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32-Bit Reduced Instruction Set Computer (RISC) Microprocessors(32位精簡指令集微處理器) |
| 中文描述： | 32位精簡指令集計算機（RISC）微處理器（32位精簡指令集微處理器） |
| 文件頁數(shù)： | 7/44頁 |
| 文件大?。?/td> | 562K |
| 代理商： | POWERPC 750CX |
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PowerPC 750CX RISC Microprocessor Datasheet
Page 7
Version 1.1
November 13, 2000
1.0 Preface
The PowerPC 750CX RISC Microprocessor is an implementation of the PowerPC
TM
family of reduced instruction set
computer (RISC) microprocessors. This document contains pertinent physical characteristics of the PowerPC 750CX
RISC Microprocessor Single Chip Modules (SCM) and covers the following topics.
Overview on page 8
Features on page 9
General Parameters on page 11
Electrical and Thermal Characteristics on page 11
- DC Electrical Characteristics on page 11
- AC Electrical Characteristics on page 14
PowerPC 750CX Microprocessor Dimension and Physical Signal Assignments on page 22
System Design Information on page 29
Ordering Information on page 39
Processor Version Register (PVR) on page 40
1.1
Special Design Level Considerations/Features
The PowerPC 750CX supports several unique features including those listed below. Section 7.9 “Operational and Design
Considerations,” on page 38 provides a more detailed explanation of these.
Provides a 64 or 32-bit Data Bus mode (per setup of QACK pin).
Supports 1.8V and 2.5V I/O signals.
Uses a reduced pin list from earlier PowerPC 750 designs (see Table 11, “Signals Missing from Previous PowerPC
750 Designs” on page 27).
Data Bus Write Only (DBWO) shares a common pin with L2_TESTCLK.
CKSTP_OUT shares a common pin with CLK_OUT.
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