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參數(shù)資料
| 型號： | PowerPC 750CX |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32-Bit Reduced Instruction Set Computer (RISC) Microprocessors(32位精簡指令集微處理器) |
| 中文描述： | 32位精簡指令集計算機（RISC）微處理器（32位精簡指令集微處理器） |
| 文件頁數(shù)： | 41/44頁 |
| 文件大?。?/td> | 562K |
| 代理商： | POWERPC 750CX |
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PowerPC 750CX RISC Microprocessor Datasheet
November 13, 2000
Version 1.1
Page 41
10.0 Document History
Table 19: Document History
Date
3/31/00
4/6/00
4/10/00
4/25/00
11/13/00
Version
1.0
Page
Description
Initial Release.
First Revision.
Added Table 13.
Added Note 5, Table 1.
Minor edits to Features section.
Updated Table 4, “DC Electrical Specifications,” on page 13 (Output High Voltage)
Updated Table 5, “Power Consumption” (Full-on Mode values).
Figure 4, “Mode Select Input Timing Diagram,” V
IH
changed to 1.24V.
Edited corresponding Table 8, note #1.
Edited table note #1 in Table 8, “TRST Timing Diagram”.
Heading title changed (Section 6.0 on Page 22) and updated mechanical drawing
dimensions.
Updated Figure 11, “Pinout of the 256 PBGA Package as Viewed from Solder Ball
side.”
Updated Figure 12, “Side Profile View of PBGA.”
Updated Figure 13, “Side Profile View Showing Exposed Cavity.”
Corrections to Figure 14, “PowerPC 750CX Microprocessor Ball Placement.”
Updated Table 16, “Input-Output Usage” to include DD2.2.
Changed QREG to QREQ.
Edited Section 7.9.1, “Level Protection,” on page 38 (redundant with Section 7.5.1,
“Input-Output Usage,” on page 33).
Edited Section 7.9.4, “DBWO/L2_TSTCLK”.
Added Section 7.9.5, “PowerPC 750CX Revision Level Migration”.
Updated Figure 19, “IBM Part Number Key.”
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