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PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE
258
Register 092H, 192H, 292H, 392H: TTB Indirect Address
Bit
Type
Function
Default
Bit 7
R/W
RWB
0
Bit 6
R/W
A[6]
0
Bit 5
R/W
A[5]
0
Bit 4
R/W
A[4]
0
Bit 3
R/W
A[3]
0
Bit 2
R/W
A[2]
0
Bit 1
R/W
A[1]
0
Bit 0
R/W
A[0]
0
A[6:0]:
The indirect read address bits (A[6:0]) indexes into the trail trace identifier
buffers. When RRAMACC is set high, decimal addresses 0 to 63 reference
the receive capture page while addresses 64 to 127 reference the receive
expected page. The receive capture page contains the identifier bytes
extracted from the receive G.832 E3 stream. The receive expected page
contains the expected trace identifier message down-loaded from the
microprocessor. When RRAMACC is set low, decimal addresses 0 to 63
reference the transmit message buffer which contains the identifier message
to be inserted in the TR bytes of the G.832 E3 transmit stream. In this case
A[6] is a don't care (I.e., address 0 and address 64 are indexes to the same
location in the buffer). Note that only the first 16 addresses need to be written
with the trail trace message to be transmitted.
RWB:
The access control bit (RWB) selects between an indirect read or write
access to the static page of the trail trace message buffer. Writing to this
indirect address register initiates an external microprocessor access to the
static page of the trail trace message buffer. When RWB is set high, a read
access is initiated. The data read is available upon completion of the access
in the TTB Indirect Data register. When RWB is set low, a write access is
initiated. The data in the TTB Indirect Data register will be written to the
addressed location in the static page.