參數(shù)資料
型號: PIC16F818
廠商: Microchip Technology Inc.
英文描述: 18/20-Pin Enhanced FLASH Microcontrollers with nanoWatt Technology(18/20引腳,納瓦技術(shù)增強(qiáng)FLASH微控制器)
中文描述: 18/20-Pin增強(qiáng)型閃存微控制器采用納瓦技術(shù)(18/20引腳,納瓦技術(shù)增強(qiáng)閃存微控制器)
文件頁數(shù): 63/164頁
文件大小: 3045K
代理商: PIC16F818
2002 Microchip Technology Inc.
Preliminary
DS39598C-page 61
PIC16F818/819
7.9
Resetting Timer1 Register Pair
(TMR1H, TMR1L)
TMR1H and TMR1L registers are not reset to 00h on a
POR, or any other RESET, except by the CCP1 special
event triggers.
T1CON register is reset to 00h on a Power-on Reset or
a Brown-out Reset, which shuts off the timer and
leaves a 1:1 prescale. In all other RESETS, the register
is unaffected.
7.10
Timer1 Prescaler
The prescaler counter is cleared on writes to the
TMR1H or TMR1L registers.
7.11
Using Timer1 as a Real-Time
Clock
Adding an external LP oscillator to Timer1 (such as the
one described in Section 7.6, above), gives users the
option to include RTC functionality to their applications.
This is accomplished with an inexpensive watch crystal
to provide an accurate time-base, and several lines of
application code to calculate the time. When operating
in SLEEP mode and using a battery or super capacitor
as a power source, it can completely eliminate the need
for a separate RTC device and battery backup.
The application code routine
RTCisr
, shown in
Example 7-3, demonstrates a simple method to incre-
ment a counter at one-second intervals using an Inter-
rupt Service Routine. Incrementing the TMR1 register
pair to overflow triggers the interrupt and calls the rou-
tine, which increments the seconds counter by one;
additional counters for minutes and hours are
incremented as the previous counter overflow.
Since the register pair is 16-bits wide, counting up to
overflow the register directly from a 32.768 kHz clock
would take 2 seconds. To force the overflow at the
required one-second intervals, it is necessary to pre-
load it; the simplest method is to set the MSbit of
TMR1H with a
BSF
instruction. Note that the TMR1L
register is never pre-loaded or altered; doing so may
introduce cumulative error over many cycles.
For this method to be accurate, Timer1 must operate in
Asynchronous mode, and the Timer1 Overflow Inter-
rupt must be enabled (PIE1<0> = 1), as shown in the
routine
RTCinit
. The Timer1 oscillator must also be
enabled and running at all times.
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