參數(shù)資料
型號: PIC16C715
廠商: Microchip Technology Inc.
英文描述: 8-Bit CMOS Microcontroller with A/D Converter(每個I/O口有25mA驅(qū)動/吸收電流,微控制器)
中文描述: 8位CMOS微控制器與A / D轉(zhuǎn)換器(每個的I / O口有25毫安驅(qū)動/吸收電流,微控制器)
文件頁數(shù): 56/120頁
文件大小: 764K
代理商: PIC16C715
PIC16C715
DS30560A-page 56
Advance Information
1996 Microchip Technology Inc.
8.5.1
INT INTERRUPT
External interrupt on RB0/INT pin is edge triggered:
either rising if bit INTEDG (OPTION<6>) is set, or fall-
ing, if the INTEDG bit is clear. When a valid edge
appears on the RB0/INT pin, flag bit INTF
(INTCON<1>) is set. This interrupt can be disabled by
clearing enable bit INTE (INTCON<4>). Flag bit INTF
must be cleared in software in the interrupt service rou-
tine before re-enabling this interrupt. The INT interrupt
can wake-up the processor from SLEEP, if bit INTE
was set prior to going into SLEEP. The status of global
interrupt enable bit GIE decides whether or not the pro-
cessor branches to the interrupt vector following wake-
up. See Section 8.8 for details on SLEEP mode.
8.5.2
TMR0 INTERRUPT
An overflow (FFh
00h) in the TMR0 register will set
flag bit T0IF (INTCON<2>). The interrupt can be
enabled/disabled by setting/clearing enable bit T0IE
(INTCON<5>). (Section 6.0)
8.5.3
PORTB INTCON CHANGE
An input change on PORTB<7:4> sets flag bit RBIF
(INTCON<0>). The interrupt can be enabled/disabled
by setting/clearing enable bit RBIE (INTCON<4>).
(Section 5.2)
8.6
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt i.e., W register and STATUS
register. This will have to be implemented in software.
Example 8-1 store and restore the STATUS and W reg-
isters. The register, W_TEMP, must be defined in both
banks and must be defined at the same offset from the
bank base address (i.e., if W_TEMP is defined at 0x20
in bank 0, it must also be defined at 0xA0 in bank 1).
The example:
a)
Stores the W register.
b)
Stores the STATUS register in bank 0.
c)
Executes the ISR code.
d)
Restores the STATUS register (and bank select
bit).
e)
Restores the W register.
Context Saving During Interrupts
EXAMPLE 8-1:
SAVING STATUS AND W REGISTERS IN RAM
MOVWF W_TEMP ;Copy W to TEMP register, could be bank one or zero
SWAPF STATUS,W ;Swap status to be saved into W
BCF STATUS,RP0 ;Change to bank zero, regardless of current bank
MOVWF STATUS_TEMP ;Save status to bank zero STATUS_TEMP register
:
:(ISR)
:
SWAPF STATUS_TEMP,W ;Swap STATUS_TEMP register into W
;(sets bank to original state)
MOVWF STATUS ;Move W into STATUS register
SWAPF W_TEMP,F ;Swap W_TEMP
SWAPF W_TEMP,W ;Swap W_TEMP into W
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