![](http://datasheet.mmic.net.cn/260000/PIC16C715_datasheet_15942822/PIC16C715_42.png)
PIC16C715
DS30560A-page 42
Advance Information
1996 Microchip Technology Inc.
7.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 =
11
). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the
SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed the GO/DONE bit will be cleared, and
the result loaded into the ADRES register. If the A/D
interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a
SLEEP
instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
A/D Operation During Sleep
7.6
The overall accuracy of the A/D is less than
±
1 LSb for
V
DD
= 5V
±
10% and the analog V
REF
= V
DD
. This over-
all accuracy includes offset error, full scale error, and
integral error. The A/D converter is guaranteed to be
monotonic. The resolution and accuracy may be less
when either the analog reference (V
DD
) is less than
5.0V or when the analog reference (V
REF
) is less than
V
DD
.
The maximum pin leakage current is
±
5
μ
A.
In systems where the device frequency is low, use of
the A/D RC clock is preferred. At moderate to high fre-
quencies, T
AD
should be derived from the device oscil-
lator. T
AD
must not violate the minimum and should be
≤
8
μ
s for preferred operation. This is because T
AD
,
when derived from T
OSC
, is kept away from on-chip
phase clock transitions. This reduces, to a large extent,
the effects of digital switching noise. This is not possi-
ble with the RC derived clock. The loss of accuracy due
to digital switching noise can be significant if many I/O
pins are active.
In systems where the device will enter SLEEP mode
after the start of the A/D conversion, the RC clock
source selection is required. In this mode, the digital
noise from the modules in SLEEP are stopped. This
method gives high accuracy.
A/D Accuracy/Error
Note:
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 =
11
). To perform an A/D
conversion in SLEEP, the GO/DONE bit
must be set, followed by the
SLEEP
instruc-
tion.
7.7
A device reset forces all registers to their reset state.
This forces the A/D module to be turned off, and any
conversion is aborted. The value that is in the ADRES
register is not modified for a Power-on Reset. The
ADRES register will contain unknown data after a
Power-on Reset.
Effects of a RESET
7.8
If the input voltage exceeds the rail values (V
SS
or V
DD
)
by greater than 0.2V, then the accuracy of the conver-
sion is out of specification.
Connection Considerations
An external RC filter is sometimes added for anti-alias-
ing of the input signal. The R component should be
selected to ensure that the total source impedance is
kept under the 10 k
recommended specification. Any
external components connected (via hi-impedance) to
an analog input pin (capacitor, zener diode, etc.)
should have very little leakage current at the pin.
7.9
The ideal transfer function of the A/D converter is as fol-
lows: the first transition occurs when the analog input
voltage (V
AIN
) is 1 LSb (or Analog V
REF
/ 256)
(Figure 7-5).
Transfer Function
FIGURE 7-5:
A/D TRANSFER FUNCTION
Note:
For the PIC16C715, care must be taken
when using the RA0 pin in A/D conversions
due to its proximity to the OSC1 pin.
D
FFh
FEh
04h
03h
02h
01h
00h
0
1
2
3
4
2
2
(
Analog input voltage