參數(shù)資料
型號: PIC16C715
廠商: Microchip Technology Inc.
英文描述: 8-Bit CMOS Microcontroller with A/D Converter(每個I/O口有25mA驅(qū)動/吸收電流,微控制器)
中文描述: 8位CMOS微控制器與A / D轉(zhuǎn)換器(每個的I / O口有25毫安驅(qū)動/吸收電流,微控制器)
文件頁數(shù): 49/120頁
文件大?。?/td> 764K
代理商: PIC16C715
1996 Microchip Technology Inc.
Advance Information
DS30560A-page 49
PIC16C715
8.4
Power-on Reset (POR), Power-up
Timer (PWRT) and Oscillator Start-up
Timer (OST), Brown-out Reset (BOR),
and Parity Error Reset (PER)
8.4.1
POWER-ON RESET (POR)
A Power-on Reset pulse is generated on-chip when
V
DD
rise is detected (in the range of 1.5V - 2.1V). To
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to V
nate external RC components usually needed to create
a Power-on Reset. A maximum rise time for V
specified. See Electrical Specifications for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met.
For additional information, refer to Application Note
AN607, "
Power-up Trouble Shooting
DD
. This will elimi-
DD
is
."
8.4.2
POWER-UP TIMER (PWRT)
The Power-up Timer provides a fixed 72 ms nominal
time-out on power-up only, from the POR. The Power-
up Timer operates on an internal RC oscillator. The
chip is kept in reset as long as the PWRT is active. The
PWRT’s time delay allows V
level. A configuration bit is provided to enable/disable
the PWRT.
DD
to rise to an acceptable
The power-up time delay will vary from chip to chip due
to V
DD
, temperature, and process variation. See DC
parameters for details.
8.4.3
OSCILLATOR START-UP TIMER (OST)
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal oscil-
lator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
8.4.4
A configuration bit, BODEN, can disable (if clear/pro-
grammed) or enable (if set) the Brown-out Reset cir-
cuitry. If V
DD
falls below 4.0V (3.8V - 4.2V range) for
greater than parameter #35, the brown-out situation
will reset the chip. A reset may not occur if V
below 4.0V for less than parameter #35. The chip will
remain in Brown-out Reset until V
The Power-up Timer will now be invoked and will keep
the chip in RESET an additional 72 ms. If V
below BV
DD
while the Power-up Timer is running, the
chip will go back into a Brown-out Reset and the
Power-up Timer will be initialized. Once V
above BV
DD
, the Power-up Timer will execute a 72 ms
time delay. The Power-up Timer should always be
enabled when Brown-out Reset is enabled. Figure 8-
8 shows typical brown-out situations.
BROWN-OUT RESET (BOR)
DD
falls
DD
rises above BV
DD
.
DD
drops
DD
rises
FIGURE 8-8:
BROWN-OUT SITUATIONS
72 ms
BV
DD
Max.
BV
DD
Min.
V
DD
Internal
Reset
BV
DD
Max.
BV
DD
Min.
V
DD
Internal
Reset
72 ms
<72 ms
72 ms
BV
DD
Max.
BV
DD
Min.
V
DD
Internal
Reset
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