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參數(shù)資料
| 型號： | PEF2015 |
| 廠商： | SIEMENS A G |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Mini IOM-2 Controller MICO |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO28 |
| 文件頁數(shù)： | 56/84頁 |
| 文件大?。?/td> | 1568K |
| 代理商： | PEF2015 |
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PEF 2015
Registers Summary
Semiconductor Group
56
12.97
4.2.4.4
Access in demultiplexed
μ
P-interface mode:
Synchronous Transfer Receive Address Register B (SARB)
read/write
address: 6
H
OMDR:RBS = 0
Access in multiplexed
μ
P-interface mode:
Reset value: xx
H
read/write
address: 0C
H
The SARB-register specifies for synchronous transfer channel B from which input
interface and time slot the serial data is extracted. This data can then be read from the
STDB register.
ISRB
Interface Select Receive for channel B.
0…selects the PCM-interface as the input interface for synchronous
channel B.
1…selects the CFI-interface as the input interface for synchronous
channel B.
MTRB6..0
μ
P-Transfer Receive Address for channel B; selects the port and time slot
number at the interface selected by ISRB according to
tables 3
and
4
:
MTRB6..0 = MA6..0.
4.2.4.5
Access in demultiplexed
μ
P-interface mode:
Synchronous Transfer Transmit Address Register A (SAXA)
read/write
address: 7
H
OMDR:RBS = 0
Access in multiplexed
μ
P-interface mode:
Reset value: xx
H
read/write
address: 0E
H
The SAXA-register specifies for synchronous transfer channel A to which output
interface and time slot the serial data contained in the STDA-register is sent.
ISXA
Interface Select Transmit for channel A.
0…selects the PCM-interface as the output interface for synchronous
channel A.
1…selects the CFI-interface as the output interface for synchronous
channel A.
MTXA6..0
μ
P-Transfer Transmit Address for channel A; selects the port and time slot
number at the interface selected by ISXA according to
tables 3
and
4
:
MTXA6..0 = MA6..0.
bit 7
bit 0
MTRB0
ISRB
MTRB6
MTRB5
MTRB4
MTRB3
MTRB2
MTRB1
bit 7
bit 0
MTXA0
ISXA
MTXA6
MTXA5
MTXA4
MTXA3
MTXA2
MTXA1
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