參數(shù)資料
型號: PCA9698
廠商: NXP Semiconductors N.V.
英文描述: 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
中文描述: 40位調(diào)頻I2C總線先進的I / O復(fù)位,光電和INT端口
文件頁數(shù): 30/47頁
文件大?。?/td> 214K
代理商: PCA9698
PCA9698_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 19 July 2006
30 of 47
Philips Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
Only slave devices with bit IOAC = 1 answer to the GPIO All Call transaction.
Output Port register programming becomes effective at the STOP command if OCH = 0, at each acknowledge if OCH = 1.
Configuration, Polarity Inversion, and Mask interrupt registers become effective at the acknowledge.
Less than 5 bytes can be programmed by using the same scheme.
‘D5 D4 D3 D2 D1 D0’ refers to the first register to be programmed.
If more than 5 bytes are written, previous data are overwritten (the sixth Configuration register will roll over to the first
addressed Configuration register, the sixth Polarity Inversion register will roll over to the first addressed Polarity Inversion
register, the sixth Mask interrupt register will roll over to the first addressed Mask interrupt register).
Fig 23. GPIO All Call write to the Output Port, I/O Configuration, Polarity Inversion, or Mask interrupt registers
002aab952
S
1
1
0
1
1
1
0
0 A
GPIO All Call address
R/W
START condition
command register
AI = 1
A
acknowledge
from slave(s)
DATA BANK 0 A
acknowledge
from slave(s)
DATA BANK 1
acknowledge
from slave
A
acknowledge
from slave(s)
DATA BANK 2 A
acknowledge
from slave(s)
DATA BANK 3 A
acknowledge
from slave(s)
DATA BANK 4
P
STOP
condition
A
SDA
1
0 D5 D4 D3 D2 D1 D0
00 1000 for Output Port register programming bank 0
01 0000 for Polarity Inversion register programming bank 0
01 1000 for Configuration register programming bank 0
10 0000 for Mask interrupt register programming bank 0
acknowledge
from slave
Only slave devices with bit 0 IOAC = 1 answer the GPIO All Call transaction.
The programming becomes effective at the acknowledge.
If more than 1 byte is written, previous data is overwritten.
Fig 24. GPIO All Call write to the Output structure configuration, All Bank Control, or Mode selection registers
002aab953
S
1
1
0
1
1
1
0
0 A
slave address
R/W
START condition
command register
AI = 'don't care'
A
acknowledge
from slave(s)
A
acknowledge
from slave(s)
acknowledge
from slave(s)
P
STOP
condition
SDA
X
0
1
0
1
0 D1 D0
00 for Output structure configuration register programming
01 for All Bank Control register programming
10 for Mode selection register programming
DATA
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