參數(shù)資料
型號(hào)： PCA9698
廠商： NXP Semiconductors N.V.
英文描述： 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
中文描述： 40位調(diào)頻I2C總線先進(jìn)的I / O復(fù)位，光電和INT端口
文件頁(yè)數(shù)： 12/47頁(yè)
文件大?。?/td> 214K
代理商： PCA9698
PCA9698_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 19 July 2006
12 of 47
Philips Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
7.4.3
PI0 to PI4 - Polarity Inversion registers
These registers allow inversion of the polarity of the corresponding Input Port register.
Px[y] = 0: The corresponding Input Port register data polarity is retained.
Px[y] = 1: The corresponding Input Port register data polarity is inverted.
Where ‘x’ refers to the bank number (0 to 4); ‘y’ refers to the bit number (0 to 7).
7.4.4
IOC0 to IOC4 - I/O Configuration registers
These registers configure the direction of the I/O pins.
Cx[y] = 0: The corresponding port pin is an output.
Cx[y] = 1: The corresponding port pin is an input.
Where ‘x’ refers to the bank number (0 to 4); ‘y’ refers to the bit number (0 to 7).
Table 6.
Legend: * default value.
Address
10h
11h
12h
13h
14h
PI0 to PI4 - Polarity Inversion registers (address 10h to 14h) bit description
Register
PI0
PI1
PI2
PI3
PI4
Bit
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
Symbol
P0[7:0]
P1[7:0]
P2[7:0]
P3[7:0]
P4[7:0]
Access
R/W
R/W
R/W
R/W
R/W
Value
0000 0000*
0000 0000*
0000 0000*
0000 0000*
0000 0000*
Description
Polarity Inversion register bank 0
Polarity Inversion register bank 1
Polarity Inversion register bank 2
Polarity Inversion register bank 3
Polarity Inversion register bank 4
Table 7.
Legend: * default value.
Address
18h
19h
1Ah
1Bh
1Ch
IOC0 to IOC4 - I/O Configuration registers (address 18h to 1Ch) bit description
Register
IOC0
IOC1
IOC2
IOC3
IOC4
Bit
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
Symbol
C0[7:0]
C1[7:0]
C2[7:0]
C3[7:0]
C4[7:0]
Access
R/W
R/W
R/W
R/W
R/W
Value
1111 1111*
1111 1111*
1111 1111*
1111 1111*
1111 1111*
Description
I/O Configuration register bank 0
I/O Configuration register bank 1
I/O Configuration register bank 2
I/O Configuration register bank 3
I/O Configuration register bank 4
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