參數(shù)資料
型號(hào): PCA9698
廠商: NXP Semiconductors N.V.
英文描述: 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
中文描述: 40位調(diào)頻I2C總線(xiàn)先進(jìn)的I / O復(fù)位,光電和INT端口
文件頁(yè)數(shù): 27/47頁(yè)
文件大?。?/td> 214K
代理商: PCA9698
PCA9698_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 19 July 2006
27 of 47
Philips Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
OE is LOW (with OEPOL = 0) or HIGH (with OEPOL = 1) to observe a change in the outputs.
OCH = 0. When OCH = 1, the change in the port happens at the acknowledge phase.
Two, three, or four adjacent banks can be programmed by using the Auto-Increment feature (AI = 1) and change at the
corresponding output port becomes effective at the STOP command when OCH = 0, or at each acknowledge when
OCH = 1.
Fig 16. Write to a specific output port
002aab945
S A6 A5 A4 A3 A2 A1 A0 0 A
slave address
R/W
START condition
A
acknowledge
from slave
DATA BANK X
P
STOP
condition
A
SDA
t
v(Q)
write to port
data out from port
data X valid
AI
0
0
0
1 D2 D1 D0
acknowledge
from slave
acknowledge
from slave
bank X
determined by
D2, D1, D0
The programing becomes effective at the Acknowledge.
Less than 5 bytes can be programmed by using the same scheme. ‘D5 D4 D3 D2 D1 D0’ refers to the first register to be
programmed.
If more than 5 bytes are written, previous data are overwritten (the sixth configuration register will roll over to the first
addressed configuration register, the sixth Polarity Inversion register will roll over to the first addressed Polarity Inversion
register, the sixth Mask interrupt register will roll over to the first addressed Mask interrupt register.
Fig 17. Write to the I/O Configuration, Polarity Inversion, or Mask interrupt registers (5 banks)
002aab946
S A6 A5 A4 A3 A2 A1 A0 0 A
slave address
R/W
START condition
command register
AI = 1
A
acknowledge
from slave
DATA BANK 0 A
acknowledge
from slave
DATA BANK 1
acknowledge
from slave
A
acknowledge
from slave
DATA BANK 2 A
acknowledge
from slave
DATA BANK 3 A
acknowledge
from slave
DATA BANK 4
P
STOP
condition
A
SDA
1
0 D5 D4 D3 D2 D1 D0
01 0000 for Polarity Inversion register programming bank 0
01 1000 for Configuration register programming bank 0
10 0000 for Mask interrupt register programming bank 0
acknowledge
from slave
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