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| 型號(hào)： | PCA9502 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit I/O expander with I2C-bus/SPI interface |
| 中文描述： | 8位I / O擴(kuò)展接口與I2C-bus/SPI |
| 文件頁數(shù)： | 7/25頁 |
| 文件大小： | 125K |
| 代理商： | PCA9502 |
PCA9502_3
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 13 October 2006
7 of 25
NXP Semiconductors
PCA9502
8-bit I/O expander with I
2
C-bus/SPI interface
9.
I
2
C-bus operation
The two lines of the I
2
C-bus are a serial data line (SDA) and a serial clock line (SCL). Both
lines are connected to a positive supply via a pull-up resistor, and remain HIGH when the
bus is not busy. Each device is recognized by a unique address whether it is a
microcomputer, LCD driver, memory or keyboard interface and can operate as either a
transmitter or receiver, depending on the function of the device. A device generating a
message or data is a transmitter, and a device receiving the message or data is a
receiver. Obviously, a passive function like an LCD driver could only be a receiver, while a
microcontroller or a memory can both transmit and receive data.
9.1 Data transfers
One data bit is transferred during each clock pulse (see
Figure 4
). The data on the SDA
line must remain stable during the HIGH period of the clock pulse in order to be valid.
Changes in the data line at this time will be interpreted as control signals. A HIGH-to-LOW
transition of the data line (SDA) while the clock signal (SCL) is HIGH indicates a START
condition, and a LOW-to-HIGH transition of the SDA while SCL is HIGH defines a STOP
condition (see
Figure 5
). The bus is considered to be busy after the START condition and
free again at a certain time interval after the STOP condition. The START and STOP
conditions are always generated by the master.
The number of data bytes transferred between the START and STOP condition from
transmitter to receiver is not limited. Each byte, which must be eight bits long, is
transferred serially with the most significant bit first, and is followed by an acknowledge bit.
(see
Figure 6
). The clock pulse related to the acknowledge bit is generated by the master.
The device that acknowledges has to pull down the SDA line during the acknowledge
clock pulse, while the transmitting device releases this pulse (see
Figure 7
).
Fig 4.
Bit transfer on the I
2
C-bus
Fig 5.
START and STOP conditions
mba607
data line
stable;
data valid
change
of data
allowed
SDA
SCL
mba608
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9502BS | 功能描述:接口-I/O擴(kuò)展器 8-BITI/O EXPDR W/I2C-SPI INTRF RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9502BS,128 | 功能描述:接口-I/O擴(kuò)展器 8-BITI/O EXPDR RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9502BS,151 | 功能描述:接口-I/O擴(kuò)展器 I/O EXPANDER I2C RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9502BS,157 | 功能描述:接口-I/O擴(kuò)展器 8-BITI/O EXPDR RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9502BS-F | 功能描述:接口-I/O擴(kuò)展器 8-BITI/O EXPDR W/I2C-SPI INTRF RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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