參數(shù)資料
型號(hào): PCA9502
廠商: NXP Semiconductors N.V.
英文描述: 8-bit I/O expander with I2C-bus/SPI interface
中文描述: 8位I / O擴(kuò)展接口與I2C-bus/SPI
文件頁數(shù): 3/25頁
文件大?。?/td> 125K
代理商: PCA9502
PCA9502_3
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 13 October 2006
3 of 25
NXP Semiconductors
PCA9502
8-bit I/O expander with I
2
C-bus/SPI interface
6.
Pinning information
6.1 Pinning
6.2 Pin description
a. I
2
C-bus interface
b. SPI interface
Fig 3.
Pin configuration for HVQFN24
G
G
G
GPIO4
V
SS
GPIO3
GPIO2
GPIO1
GPIO0
S
n
A1
A0
V
DD
V
DD
V
DD
RESET
V
D
V
S
S
002aab839
Transparent top view
V
D
V
S
V
D
terminal 1
index area
6
13
5
14
4
15
3
16
2
17
1
18
7
8
9
1
1
1
2
2
2
2
2
1
PCA9502BS
I
G
G
G
GPIO4
V
SS
GPIO3
GPIO2
GPIO1
GPIO0
S
S
SI
CS
V
SS
V
DD
V
DD
RESET
V
D
V
S
V
S
002aab840
Transparent top view
V
D
V
S
V
D
terminal 1
index area
6
13
5
14
4
15
3
16
2
17
1
18
7
8
9
1
1
1
2
2
2
2
2
1
PCA9502BS
I
Table 2.
Symbol
RESET
V
DD
Pin description
Pin
1
2, 3, 11,
22, 24
4
Type
I
-
Description
device hardware reset (active LOW)
[1]
power supply
I2C/SPI
I
I
2
C-bus or SPI interface select. I
2
C-bus interface is selected if this
pin is at logic HIGH. SPI interface is selected if this pin is at logic
LOW.
SPI chip select or I
2
C-bus device address select A0. If SPI
configuration is selected by I2C/SPI pin, this pin is the SPI chip
select pin (Schmitt trigger, active LOW). If I
2
C-bus configuration
is selected by I2C/SPI pin, this pin along with A1 pin allows user
to change the device’s base address.
SPI data input pin or I
2
C-bus device address select A1. If SPI
configuration is selected by I2C/SPI pin, this is the SPI data input
pin. If I
2
C-bus configuration is selected by I2C/SPI pin, this pin
along with A0 pin allows user to change the device’s base
address. To select the device address, please refer to
Table 11
.
SPI data output pin. If SPI configuration is selected by I2C/SPI
pin, this is a 3-stateable output pin. If I
2
C-bus configuration is
selected by I2C/SPI pin, this pin function is undefined and must
be left as n.c. (not connected).
I
2
C-bus or SPI input clock.
I
2
C-bus data input/output, open-drain if I
2
C-bus configuration is
selected by I2C/SPI pin. If SPI configuration is selected then this
pin is an undefined pin and must be connected to V
SS
.
CS/A0
5
I
SI/A1
6
I
SO
7
O
SCL/SCLK
SDA
8
9
I
I/O
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