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參數(shù)資料
| 型號： | P90CE201AEB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit microcontroller |
| 中文描述： | 16-BIT, 24 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 8/77頁 |
| 文件大?。?/td> | 235K |
| 代理商： | P90CE201AEB |
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August 1993
8
Philips Semiconductors
Product specification
16-bit microcontroller
P90CE201
5
CPU FUNCTIONAL DESCRIPTION
5.1
General
The CPU of the P90CE201 is software compatible with the
68000, consequently programs written for the 68000 will
run on the P90CE201 unchanged. However, for certain
applications the following differences between the
processors should be noted:
The initialization of the System Control Registers.
Differences exist in the address error exception
processing since the P90CE201 can provide full error
recovery.
The timing is different because of the P90CE201’s new
architecture and technology. The instruction execution
timing is completely different for the same reason.
5.2
5.2 Programming model and data organization
The programming model is identical to that of the 68000
and is shown in Fig.3. It contains seventeen 32-bit
registers, a 32-bit Program Counter and a 16-bit Status
Register. The first eight registers (D0 to D7) are used as
data registers for byte, word and long-word operations.
The second group of registers (A0 to A6) and the System
Stack Pointer (A7) can be used as software stack pointers
and base address registers. In addition, these registers
can be used for word and long-word address operations.
All seventeen registers can be used as Index Registers.
The P90CE201 supports 8, 16 and 32-bit integer data,
BCD data 32-bit addresses. Each data type is arranged in
memory as shown in Fig.4.
Fig.3 Programming model.
handbook, full pagewidth
Eight
Data
Registers
Program
Counter
Two Stack
Pointers
Seven
Address
Registers
A6
A0
31
16
15
8
7
0
DO
D1
D2
D3
D4
D5
D6
D7
USER STACK POINTER
SUPERVISOR STACK POINTER
A7
31
16
15
0
A1
A2
A3
A4
A5
31
0
Status
Register
SYSTEM
BYTE
USER
BYTE
15
8
7
0
MCD504
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