參數(shù)資料
型號: P89LPC930
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
中文描述: 8位微控制器兩個小時80C51的核心4 KB的/ 8 KB的256 3伏閃存內(nèi)存字節(jié)的數(shù)據(jù)
文件頁數(shù): 7/55頁
文件大?。?/td> 267K
代理商: P89LPC930
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
7 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P1.0 - P1.7
18, 17, 12,
11, 10, 6,
5, 4
I/O, I
[1]
Port 1:
Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input only
mode with the internal pull-up disabled. The operation of the configurable Port 1 pins
as inputs and outputs depends upon the port configuration selected. Each of the
configurable port pins are programmed independently. Refer to
Section 8.11.1 “Port
configurations”
and
Table 7 “DC electrical characteristics”
for details. P1.2 - P1.3 are
open drain when used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port 1 also provides various special functions as described below:
P1.0 —
Port 1 bit 0.
TxD —
Transmitter output for the serial port.
P1.1 —
Port 1 bit 1.
RXD —
Receiver input for the serial port.
P1.2 —
Port 1 bit 2 (open-drain when used as output).
T0 —
Timer/counter 0 external count input or overflow output (open-drain when used
as output).
SCL —
I
2
C serial clock input/output.
P1.3 —
Port 1 bit 3 (open-drain when used as output).
INT0 —
External interrupt 0 input.
SDA —
I
2
C serial data input/output.
P1.4 —
Port 1 bit 4.
INT1 —
External interrupt 1 input.
P1.5 —
Port 1 bit 5 (input only).
RST —
External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force In-System
Programming mode.
When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
DD
has reached its specified level.
When system power is removed V
DD
will fall below the minimum specified
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when V
DD
falls below the minimum specified operating voltage.
P1.6 —
Port 1 bit 6.
P1.7 —
Port 1 bit 7.
18
I/O
O
I/O
I
I/O
I/O
17
12
I/O
I
I
I/O
I
I
I
I
11
10
6
5
4
I/O
I/O
Table 3:
Symbol
Pin description
…continued
Pin
Type
Description
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