參數(shù)資料
型號: P89LPC930
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
中文描述: 8位微控制器兩個(gè)小時(shí)80C51的核心4 KB的/ 8 KB的256 3伏閃存內(nèi)存字節(jié)的數(shù)據(jù)
文件頁數(shù): 27/55頁
文件大?。?/td> 267K
代理商: P89LPC930
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
27 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.15.3
Mode 2
Mode 2 configures the Timer register as an 8-bit Counter with automatic reload.
Mode 2 operation is the same for Timer 0 and Timer 1.
8.15.4
Mode 3
When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit
counters and is provided for applications that require an extra 8-bit timer. When
Timer 1 is in Mode 3 it can still be used by the serial port as a baud rate generator.
8.15.5
Mode 6
In this mode, the corresponding timer can be changed to a PWM with a full period of
256 timer clocks.
8.15.6
Timer overflow toggle output
Timers 0 and 1 can be configured to automatically toggle a port output whenever a
timer overflow occurs. The same device pins that are used for the T0 and T1 count
inputs are also used for the timer toggle outputs. The port outputs will be a logic ‘1’
prior to the first timer overflow when this mode is turned on.
8.16 Real-Time clock/system timer
The P89LPC930/931 has a simple Real-Time clock that allows a user to continue
running an accurate timer while the rest of the device is powered-down. The
Real-Time clock can be a wake-up or an interrupt source. The Real-Time clock is a
23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down
counter. When it reaches all ‘0’s, the counter will be reloaded again and the RTCF
flag will be set. The clock source for this counter can be either the CPU clock (CCLK)
or the XTAL oscillator, provided that the XTAL oscillator is not being used as the CPU
clock. If the XTAL oscillator is used as the CPU clock, then the RTC will use CCLK as
its clock source. Only power-on reset will reset the Real-Time clock and its
associated SFRs to the default state.
8.17 UART
The P89LPC930/931 has an enhanced UART that is compatible with the
conventional 80C51 UART except that Timer 2 overflow cannot be used as a baud
rate source. The P89LPC930/931 does include an independent Baud Rate
Generator. The baud rate can be selected from the oscillator (divided by a constant),
Timer 1 overflow, or the independent Baud Rate Generator. In addition to the baud
rate generation, enhancements over the standard 80C51 UART include Framing
Error detection, automatic address recognition, selectable double buffering and
several interrupt options. The UART can be operated in 4 modes: shift register, 8-bit
UART, 9-bit UART, and CPU clock/32 or CPU clock/16.
8.17.1
Mode 0
Serial data enters and exits through RxD. TxD outputs the shift clock. 8 bits are
transmitted or received, LSB first. The baud rate is fixed at
1
16
of the CPU clock
frequency.
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