參數(shù)資料
型號： P89LPC930
廠商： NXP Semiconductors N.V.
英文描述： 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
中文描述： 8位微控制器兩個小時80C51的核心4 KB的/ 8 KB的256 3伏閃存內存字節(jié)的數(shù)據(jù)
文件頁數(shù)： 55/55頁
文件大?。?/td> 267K
代理商： P89LPC930
Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 15 December 2004
Document order number: 9397 750 14472
Contents
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
1
2
3
3.1
4
5
5.1
5.2
6
7
8
8.1
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.10.1
8.11
8.11.1
8.11.2
8.11.3
8.11.4
8.11.5
8.11.6
8.11.7
8.12
8.12.1
8.12.2
8.13
8.13.1
8.13.2
8.13.3
8.14
8.14.1
8.15
8.15.1
8.15.2
8.15.3
8.15.4
8.15.5
8.15.6
8.16
8.17
General description. . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information. . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pinning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Special function registers. . . . . . . . . . . . . . . . . . . . . 11
Functional description . . . . . . . . . . . . . . . . . . . . . . . 16
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clock definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
CPU clock (OSCCLK) . . . . . . . . . . . . . . . . . . . . . . . 16
Low speed oscillator option . . . . . . . . . . . . . . . . . . . 16
Medium speed oscillator option . . . . . . . . . . . . . . . . 16
High speed oscillator option. . . . . . . . . . . . . . . . . . . 16
Clock output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
On-chip RC oscillator option . . . . . . . . . . . . . . . . . . 17
Watchdog oscillator option. . . . . . . . . . . . . . . . . . . . 17
External clock input option. . . . . . . . . . . . . . . . . . . . 17
CPU CLock (CCLK) wake-up delay . . . . . . . . . . . . . 19
CPU CLOCK (CCLK) modification: DIVM register. . 19
Low power select . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Memory organization . . . . . . . . . . . . . . . . . . . . . . . . 19
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
External interrupt inputs. . . . . . . . . . . . . . . . . . . . . . 20
I/O ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Port configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Quasi-bidirectional output configuration. . . . . . . . . . 22
Open-drain output configuration. . . . . . . . . . . . . . . . 22
Input-only configuration . . . . . . . . . . . . . . . . . . . . . . 22
Push-pull output configuration . . . . . . . . . . . . . . . . . 22
Port 0 analog functions . . . . . . . . . . . . . . . . . . . . . . 22
Additional port features . . . . . . . . . . . . . . . . . . . . . . 24
Power monitoring functions . . . . . . . . . . . . . . . . . . . 24
Brownout detection . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power-on detection . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power reduction modes . . . . . . . . . . . . . . . . . . . . . . 24
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Total Power-down mode. . . . . . . . . . . . . . . . . . . . . . 25
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Reset vector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . . . . . 26
Mode 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Mode 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Mode 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Mode 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Mode 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Timer overflow toggle output . . . . . . . . . . . . . . . . . . 27
Real-Time clock/system timer . . . . . . . . . . . . . . . . . 27
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.17.1
8.17.2
8.17.3
8.17.4
8.17.5
8.17.6
8.17.7
8.17.8
8.17.9
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Baud rate generator and selection . . . . . . . . . . . . . . 28
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Break detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Double buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Transmit interrupts with double buffering
enabled (Modes 1, 2 and 3). . . . . . . . . . . . . . . . . . . 29
The 9
th
bit (bit 8) in double buffering (Modes 1, 2 and
3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
I
2
C-bus serial interface . . . . . . . . . . . . . . . . . . . . . . . 30
Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . 31
Typical SPI configurations. . . . . . . . . . . . . . . . . . . . . 33
Analog comparators . . . . . . . . . . . . . . . . . . . . . . . . . 35
Internal reference voltage. . . . . . . . . . . . . . . . . . . . . 35
Comparator interrupt. . . . . . . . . . . . . . . . . . . . . . . . . 36
Comparators and power reduction modes . . . . . . . . 36
Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . . . . . . 36
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Flash program memory. . . . . . . . . . . . . . . . . . . . . . . 38
General description. . . . . . . . . . . . . . . . . . . . . . . . . . 38
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Using Flash as data storage. . . . . . . . . . . . . . . . . . . 38
ISP and IAP capabilities of the P89LPC930/931 . . . 38
User configuration bytes. . . . . . . . . . . . . . . . . . . . . . 40
User sector security bytes . . . . . . . . . . . . . . . . . . . . 40
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 42
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . 44
Comparator electrical characteristics . . . . . . . . . . . 51
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
8.17.10
8.18
8.19
8.19.1
8.20
8.20.1
8.20.2
8.20.3
8.21
8.22
8.23
8.23.1
8.23.2
8.24
8.24.1
8.24.2
8.24.3
8.24.4
8.25
8.26
9
10
11
12
13
14
15
16
17
18
相關PDF資料
PDF描述
P89LPC933 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters
P89LPC934 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters
P89LPC935 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters
P89LPC935FA 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters
P89LPC936 8-BIT SINGLE CHIP MICROCONTROLLERS
相關代理商/技術參數(shù)
參數(shù)描述
P89LPC9301 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash
P89LPC9301FDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash
P89LPC9301FDH,512 功能描述:8位微控制器 -MCU IC 80C51 MCU FLASH 4K RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
P89LPC930FDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
P89LPC930FDH,129 功能描述:8位微控制器 -MCU 80C51 4K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*