參數(shù)資料
型號: P89LPC930
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
中文描述: 8位微控制器兩個小時80C51的核心4 KB的/ 8 KB的256 3伏閃存內(nèi)存字節(jié)的數(shù)據(jù)
文件頁數(shù): 38/55頁
文件大?。?/td> 267K
代理商: P89LPC930
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
38 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.24 Flash program memory
8.24.1
General description
The P89LPC930/931 Flash memory provides in-circuit electrical erasure and
programming. The Flash can be read, erased, or written as bytes. The Sector and
Page Erase functions can erase any Flash sector (1 kB) or page (64 bytes). The Chip
Erase operation will erase the entire program memory. In-System Programming and
standard parallel programming are both available. On-chip erase and write timing
generation contribute to a user-friendly programming interface. The P89LPC930/931
Flash reliably stores memory contents even after more than 100,000 erase and
program cycles. The cell is designed to optimize the erase and programming
mechanisms. The P89LPC930/931 uses V
DD
as the supply voltage to perform the
Program/Erase algorithms.
8.24.2
Features
Byte-erase allowing code memory to be used for data storage.
Internal fixed boot ROM, containing low-level In-Application Programming (IAP)
routines.
User programs can call these routines to perform In-Application Programming
(IAP).
Default loader providing In-System Programming via the serial port, located in
upper end of user program memory.
Boot vector allows user-provided Flash loader code to reside anywhere in the
Flash memory space, providing flexibility to the user.
Programming and erase over the full operating voltage range.
Programming/Erase using ISP/IAP.
Any flash program/erase operation in 2 ms.
Parallel programming with industry-standard commercial programmers.
Programmable security for the code in the Flash for each sector.
More than 100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
8.24.3
Using Flash as data storage
The Flash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a
MOVC instruction is not allowed to read code memory contents of a secured sector).
Thus any byte in a non-secured sector may be used for non-volatile data storage.
8.24.4
ISP and IAP capabilities of the P89LPC930/931
Flash organization:
The P89LPC930/931 program memory consists of eight 1 KB
sectors. Each sector can be further divided into 64-byte pages. In addition to sector
erase and page erase, a 64-byte page register is included which allows from 1 to 64
bytes of a given page to be programmed at the same time, substantially reducing
overall programming time. An In-Application Programming (IAP) interface is provided
to allow the end user’s application to erase and reprogram the user code memory. In
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