參數(shù)資料
型號(hào): P89LPC930
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
中文描述: 8位微控制器兩個(gè)小時(shí)80C51的核心4 KB的/ 8 KB的256 3伏閃存內(nèi)存字節(jié)的數(shù)據(jù)
文件頁(yè)數(shù): 30/55頁(yè)
文件大?。?/td> 267K
代理商: P89LPC930
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
30 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.18 I
2
C-bus serial interface
I
2
C-bus uses two wires (SDA and SCL) to transfer information between devices
connected to the bus, and it has the following features:
Bidirectional data transfer between masters and slaves.
Multimaster bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate
via one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer.
The I
2
C-bus may be used for test and diagnostic purposes.
A typical I
2
C-bus configuration is shown in
Figure 7
. The P89LPC930/931 device
provides a byte-oriented I
2
C-bus interface that supports data transfers up to 400 kHz.
Fig 7.
I
2
C-bus configuration.
OTHER DEVICE
WITH I
2
C-BUS
INTERFACE
SDA
SCL
RP
RP
OTHER DEVICE
WITH I
C-BUS
INTERFACE
P1.3/SDA
P1.2/SCL
P89LPC930/931
I
2
C-BUS
002aaa433
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