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| 型號(hào)： | NSC800N |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| 中文描述： | NSC800TM高性能低功耗CMOS微處理器 |
| 文件頁數(shù)： | 55/76頁 |
| 文件大小： | 785K |
| 代理商： | NSC800N |
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12.13 CPU Control
(Continued)
IM
1
The CPU is placed in interrupt mode 1.
D D D
7
No flags affected
0
6
5
4
3
2
1
1
1
1
0
1
1
0
1
0
1
0
1
0
1
1
0
Timing:
M cycles D 2
T states D 8 (4, 4)
Addressing Mode:
N/A
IM
2
The CPU is placed in interrupt mode 2.
D D D
7
No flags affected
0
6
5
4
3
2
1
1
1
1
0
1
1
0
1
0
1
0
1
1
1
1
0
Timing:
M cycles D 2
T states D 8 (4, 4)
Addressing Mode:
N/A
12.14 Program Control
JUMPS
JP
nn
Unconditional jump to program location nn.
PC
w
nn
7
6
5
4
3
2
No flags affected
0
1
1
1
0
0
0
0
1
1
n (low-order byte)
n (high-order byte)
Timing:
M cycles D 3
T states D 10 (4, 3, 3)
Addressing Mode:
Direct
JP
(ss)
Unconditional jump to program location pointed to by regis-
ter ss.
PC
w
ss
No flags affected
7
6
5
4
3
2
1
0
1
1
1
0
1
0
0
1
JP (HL)
Timing:
M cycles D 1
T states D 4
Addressing Mode:
Register Indirect
7
6
5
4
3
2
1
0
JP (IX) (for N
X
e
0)
1
1
N
X
1
1
1
0
1
JP (IY) (for N
X
e
1)
1
1
1
0
1
0
0
1
Timing:
M cycles D 2
T states D 8 (4, 4)
Addressing Mode:
Register Indirect
JP
cc, nn
Conditionally jump to program location nn based on testable
flag states.
If cc true,
PC
w
nn,
otherwise continue
7
6
5
No flags affected
4
3
2
1
0
1
1
cc
0
1
0
n (low-order byte)
n (high-order byte)
Timing:
M cycles D 3
T states D 10 (4, 3, 3)
Addressing Mode:
Direct
JR
d
Unconditional jump to program location calculated with re-
spect to the program counter and the displacement d.
PC
w
PC
a
d
No flags affected
7
6
5
4
3
2
1
0
0
0
0
1
1
0
0
0
d
b
2
Timing:
M cycles D 3
T states D 12 (4, 3, 5)
Addressing Mode:
PC Relative
JR
kk, d
Conditionally jump to program location calculated with re-
spect to the program counter and the displacement d,
based on limited testable flag states.
If kk true,
PC
w
PC
a
d,
otherwise continue
7
6
5
No flags affected
4
3
2
1
0
0
0
1
kk
0
0
0
d
b
2
Timing:
if kk met
M cycles D 3
(true)
T states D 12 (4, 3, 5)
if kk not met
M cycles D 2
(not true)
T states D 7 (4, 3)
Addressing Mode:
PC Relative
55
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相關(guān)代理商/技術(shù)參數(shù) |
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| NSC800N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
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| NSC800N-1/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800N-1/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
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